The aim of this section is to properly configure the LVDS settings.
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The Device Tree Overlays (DTODTBO) provide a way to modify the overall device tree without re-compiling the complete device tree.
Overlays are fragments of a complete device tree that can be included or removed according to the environment. The direct consequence is enabling/disabling the hardware components of the system.
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Verify the signal timing specifications of the LCD in the datasheet and then calculate following parameters:
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Parameter | Definition | |
|---|---|---|
hback-porch | Horizontal Back Porch (HBP) - Number of pixel clock pulses between HSYNC signal and the first valid pixel data. | |
hfront-porch | Horizontal Front Porch in pixels | vback-porchHoriHorizontal Front porch (HFP) - Number of pixel clock pulses between the last valid pixel data in the line and the next HSYNC pulse. |
vback-porch | Vertical Back Porch (VBP) - Number of lines (HSYNC pulses) from a VSYNC signal to the first valid line. | |
vfront-porch | Vertical Front Porch in pixels(VFP) - Number of lines (HSYNC pulses) between the last valid line of the frame and the next VSYNC pulse. | |
hsync-len | Number of PIXCLK pulses when a HSYNC signal is active. | |
vsync-len | Number of HSYNC pulses when a VSYNC signal is active. |
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by using the open source reference available at the following path https://www.epanorama.net/faq/vga2rgb/calc.html .
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The MIPI DSI support on i.MX8-based boards is enabled configured via the overlays device trees located in the Kernel source sources at arch/arm64/boot/dts/seco. MIPI-DSI on i.MX8 with IPU is supported with Synopsys hardware while i.MX8 uses the Mixel and the Advantec panels./overlays.
SECO boards with i.MX8 SoC support the following bridge from MIPI-DSI interfacesinterface to LVDS / eDP:
Texas Instruments SN65DSI84 MIPI® DSI bridge to FlatLink™ LVDS single-channel DSI to dual-link LVDS bridge;
Texas Instruments SN65DSI86 Dual-channel MIPI® DSI to embedded DisplayPort™ (eDP ) bridge.
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The connected panel is represented in the device tree in its own node. That node references the used LDB/LVDS channel through its node 'port' (RIFORMULARE). Both panel-simple and panel-lvds driver can be used, as described below. NON CAPISCO SE QUI DOVREBBE ESSERCI UN SECONDO PUNTO ELENCO, MI SEMBRA CHE LE OPZIONI DA SPIEGARE SIANO 2.
Panel Simple
Set the compatible property to an existing or newly added panel from the panel-simple driver.
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There are the following statements in the drivers/gpu/drm/panel/panel-simple.c file (NON HO CAPITO)
| Code Block |
|---|
static const struct display_timing auo_p215hca_high_timing = {
.pixelclock = { 139000000, 160000000, 165000000 },
.hactive = { 1920, 1920, 1920 },
.hfront_porch = { 1, 85, 90 },
.hsync_len = { 1, 10, 45 },
.hback_porch = { 1, 85, 150 },
.vactive = { 1080, 1080, 1080 },
.vfront_porch = { 3, 20, 50 },
.vsync_len = { 6, 10,60 },
.vback_porch = { 11, 20, 37 },
.flags = DISPLAY_FLAGS_HSYNC_LOW |
DISPLAY_FLAGS_VSYNC_LOW |
DISPLAY_FLAGS_DE_LOW |
DISPLAY_FLAGS_PIXDATA_NEGEDGE,
};
static const struct panel_desc auo_p215hca_high = {
.timings = &auo_p215hca_high_timing,
.num_timings = 1,
.bpc = 8,
.size = {
.width = 68,
.height = 121,
},
.delay = {
/*
* The panel spec recommends one second delay
* to the below items. However, it's a bit too
* long in pratical. Based on tests, it turns
* out 100 milliseconds is fine.
*/
.prepare = 100,
.enable = 100,
.unprepare = 100,
.disable = 100,
},
.bus_format = MEDIA_BUS_FMT_RGB888_1X24,//MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
};
static const struct of_device_id platform_of_match[] = {
{
}, {
.compatible = "auo,p215hca-high",
.data = &auo_p215hca_high,
}, {
/* sentinel */
}
};
MODULE_DEVICE_TABLE(of, platform_of_match); |
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After the timing parameter need to call the device tree file with compatible device on the panel. (NON HO CAPITO)
Please refer the respective SECO boards device tree (.dts)file. PER FARE COSA? QUELLO CHE è SCRITTO SOPRA?
E.g.: seco-imx8mm-c72.dts
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