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Parameter | Definition |
|---|---|
hback-porch | Horizontal Back Porch (HBP) - Number of pixel clock pulses between HSYNC signal and the first valid pixel data. |
hfront-porch | HoriHorizontal Horizontal Front porch (HFP) - Number of pixel clock pulses between the last valid pixel data in the line and the next HSYNC pulse. |
vback-porch | Vertical Back Porch (VBP) - Number of lines (HSYNC pulses) from a VSYNC signal to the first valid line. |
vfront-porch | Vertical Front Porch (VFP) - Number of lines (HSYNC pulses) between the last valid line of the frame and the next VSYNC pulse. |
hsync-len | Number of PIXCLK pulses when a HSYNC signal is active. |
vsync-len | Number of HSYNC pulses when a VSYNC signal is active. |
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LVDS Customization Guide for i.MX6
The i.MX6-based boards use the fbdev interface for mode setting and output configuration.
There are two IPU units on the i.mx6q SoC, and only one IPU unit on the i.mx6dl SoC. Each IPU unit has two display interfaces. The Vivante X driver can only make use of the first framebuffer /dev/fb0, while the others can be used through the fbdev framebuffer interface.
The assignment of the possible display outputs to the framebuffers (scan-out engines) and their timing configuration can be done both through Kernel command line and within the device tree. The command line settings take precedence over the device tree.
The first and third video output has an additional overlay framebuffer configured.
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Video output
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IPU core
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fb boot name
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fb device
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Overlay fb device
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First
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IPU1
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mxcfb0
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/dev/fb0
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/dev/fb1
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Second
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IPU1
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mxcfb1
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/dev/fb2
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Third
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IPU2
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mxcfb2
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/dev/fb3
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/dev/fb4
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Fourth
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IPU2
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mxcfb3
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/dev/fb5
In order to bring up custom display following steps are needed:
1. Kernel: Adding Custom LVDS support in Device tree file for i.MX6
To obtain the information about the ldb structure, you can refer to the documentation available into the Kernel:
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