...
In 2003, Seco created the world's first SODIMM200 based ARM module Trizeps III.
The PXA255 based Trizeps III was the first module, with integrated Ethernet and USB/Host to a small module.
It opened the industrial market for a new technology.
The older SODIMM 144 Standard is still living and even here all modules fit into the very first board build for Trizeps-I (StrongARM).
...
Excel Sheet containing pinning of current Trizeps modules and baseboards: trizeps_standard_v11.zip
Old Excel-Sheet also containing Trizeps IV(M) and Trizeps V: SODIMM200 Standard (v9)
Trizeps VIII Family Comparison
Trizeps VIII Nano | Trizeps VIII Mini | Trizeps VIII Plus | Trizeps VIII | |
|---|---|---|---|---|
Main CPU | 4x Arm Cortex A53 | 4x Arm Cortex A53 | 4x Arm Cortex A53 | 4x Arm Cortex A53 |
MCU/DSP | Cortex-M7 650MHz | Cortex-M4 400MHz | Cortex-M7 800MHz | Cortex-M4 266MHz |
GDR | 16bit LPDDR4 | 32bit LPDDR4 | 32bit LPDDR4 (Inline ECC) | 32bit LPDDR4 |
GPU | GC7000UL (2 shaders), | GC NanoUltra (1 shader), | GC7000UL (2 shaders), | GC7000Lite (4 shaders), |
Security | CAAM, RDC, Arm TrustZone® | CAAM, RDC, TrustZone | CAAM, RDC, TrustZone | CAAM, RDC, TrustZone |
AI/ML | OpenCL CPU, GPU: 32GOPS | OpenCL CPU: 32GOPS | NN Accel 2.3 TOPS | OpenCL CPU: 32GOPS |
Cam | MIPI CSI (4 lanes) | MIPI CSI (4 lanes) | 2x MIPI CSI (4 lanes) | 2x MIPI CSI (4 lanes) |
screen | MIPI DSI (4-lanes) | MIPI DSI (4-lanes) | HDMI 2.0a | HDMI 2.0a |
HDR | - | - | - | HDR10, HLG, Dolby Vision® |
video decode | - | 1080p60 HEVC, H.264, | 1080p60 HEVC, H.264, | 4Kp60 HEVC, VP9, |
Video Encode | - | 1080p60 H.264, VP8 | 1080p60 H.265, H.264 | - |
Expansion I/O | 1x USB 2.0 with PHY | 2x USB 2.0 with PHY, | 2x USB 2.0/3.0 Type C with PHY, | 2x USB 3.0 Type C with PHY, |
Network, | 1x GbE, 2x SDIO/eMMC | 1x GbE, 2x SDIO/eMMC | 2x GbE (1x TSN), | 1x GbE, 2x SDIO/eMMC |