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http://gitlab.keith-koep.com/tr8firmware/tr8_fpga

Default Firmware

ssh://git@gitlab.keith-koep.com:30001/tr8firmware/tr8_fpga.git
http://gitlab.keith-koep.com/tr8firmware/tr8_fpga.git

master

The Trizeps VIII can be equipped with a Lattice MachXO3 FPGA with either 640, 1300, 2100 or 4300LUT.

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The following describes the current default-firmware, which is designed to offer best compatibility to previous Trizeps modules functionality and Seco baseboards.

I2C-Address: 0x41 (7bit)

Reg.

Name

Access

Description

Default-Value

0x00

I2C_REG_ID

read

Return ID-value

0x61

0x10

I2C_REG_DISPLAY

write

Code Block
 Display-Control-Register for
 MIPI-DSI to parallel RGB converter
 0x8.   Invert Pixel-Clock polarity
 0x4.   Invert HSync polarity
 0x2.   Invert VSync polarity
 0x1.   Invert DE polarity
 0x.C   Use RGB24, LCD_D[23..0]
 0x.8   Use RGB18, LCD_D[17..0]
 0x.4   Use RGB16, LCD_D[15..0]
 0x.1   Enable converter

0x00

0x20

I2C_REG_PINMUX

write

Code Block
 Pin-Mux-Control-Register
 0x.0   UART4/SPI2 not routed.
 0x.1   UART4 routed to on-board 
        
Bluetooth
BT-module.
 0x.2   SPI2 routed to SODIMM
        (Pins: 86 SS,88 CLK,90 MISO,92 MOSI)
 0x.3   SPI2 routed to SODIMM
        (Pins: 170 MOSI,172 CLK,178 SS,180 MISO)
 0x.4   SPI2 routed to SODIMM
        (Pins: 170 MISO,172 SS,178 CLK,180 MOSI)

0x00

0xF0

I2C_REG_VERSION

read

Code Block
 Read Version of FPGA-Code

xx

Read Version

The currently programmed version can be read in bootloader through:

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Versions prior to version 1 return „read failure“ on attempt to read register 0xF0.

Download

Date

Version

Description

Download

11.03.2021

1

Code Block
 + Added I2C_REG_VERSION 
 + Added option 4 & fixed option 3 of I2C_REG_PINMUX
 + Add extra display-reset condition.

tr8_fpga_v1_20210311.zip

27.11.2019

none

Code Block
 + Fix routing of SPI/BTUART pins.

tr8_fpga_20191127.zip

14.08.2019

none

Code Block
 + Disable clamping of pins on VDD_FPGA_MIPI power-domain.

tr8_fpga_20190814.zip

17.07.2019

none

Code Block
 + Changed I2C_SCL and I2C_SDA to OpenDrain.

tr8_fpga_20190717.zip

03.07.2019

none

Code Block
 Firmware for LCMXO3LF-2100E-6MG121C
 + Added supervisor to check wether valid display-data is received
   and if not reset receive-part.  

tr8_fpga_20190703.zip

26.04.2019

none

Firmware for LCMXO3LF-2100E-6MG121C

tr8_fpga_20190426.zip