Firmware
Customers may request access to the source-code of the firmware to modify it for their needs.
I2C-Address: 0x40 (7-bit) | ||||
Register | Name | Access | Description | Default Value |
0x01 | REG_ID | read | ID-Register | 0xA5 |
0x02 | REG_CONTROL | write | Restart and boot with BOOT_MODE= 0x04 - Power Off | - |
0x03 | REG_CONFIG | - | - | - |
0x04 | REG_PIN_CONFIG | write | <Pin> <Parameter> 1: Input, NoPull 20: Output PushPull, init low level | - |
0x05 | REG_PIN_SET | write | <Pin> <Level> | - |
0x06 | REG_PIN_GET | write | <Pin> | - |
0x07 | REG_PWM_CONFIG | write | <Pin> <Duty Cycle [%]> | - |
0x08 | REG_SECO_CODE | read | Read SECO_CODE | 0x40 |
0x09 | REG_INT_STATUS | read | Reads INT_STATUS register, clears it and resets EC_IRQ#_OD to “1” 0x01: RTC_INT# | 0x00 |
0x0A | REG_INT_ENABLE | write | Enables and disables interrupts. 0x01: RTC_INT# | - |
0xF0 | REG_VERSION | read | Read firmware version | 0x01 |
The following Pins are configurable via I2C:
Pin# | Name | Default Configuration | Alt0 |
|---|---|---|---|
0 | GPIO0/CAM0_PWR# | Input, NoPull | |
1 | GPIO1/CAM1_PWR# | Input, NoPull | |
2 | GPIO2/CAM0_RST# | Input, NoPull | |
3 | GPIO3/CAM1_RST# | Input, NoPull | |
4 | GPIO4 | Input, NoPull | |
5 | GPIO5 | Input, NoPull | PWM* |
6 | GPIO6 | Input, NoPull | |
7 | GPIO7 | Input, NoPull | |
8 | GPIO8 | Input, NoPull | |
9 | GPIO9 | Input, NoPull | |
10 | GPIO10 | Input, NoPull | |
11 | GPIO11 | Input, NoPull | |
20 | USB0_EN_OC# | Output, OpenDrain, init low level | |
21 | USB1_EN_OC# | Output, OpenDrain, init low level | |
22 | USB2_EN_OC# | Output, OpenDrain, init low level | |
23 | USB3_EN_OC# | Output, OpenDrain, init low level | |
24 | USB4_EN_OC# | Output, OpenDrain, init low level | |
25 | USB_HUB_PEN | Output, PushPull, init low level | |
26 | USB_HUB_RST#_1V8 | Output, PushPull, init low level | |
27 | ENET0_RST#_1V8 | Output, PushPull, init low level | |
28 | ENET1_RST#_1V8 | Output, PushPull, init low level | |
29 | EDP_BRG_EN | Output, PushPull, init low level | |
30 | LCD0_VDD_EN | Output, PushPull, init low level | |
31 | LCD0_BKLT_EN | Output, PushPull, init low level | |
32 | LCD0_BKLT_PWM | PWM, disabled | GPIO |
33 | LCD1_VDD_EN | Output, PushPull, init low level | |
34 | LCD1_BKLT_EN | Output, PushPull, init low level | |
35 | LCD1_BKLT_PWM | PWM, disabled | GPIO |
36 | WIFI_DISABLE | Output, PushPull, init high level | |
37 | WIFI_CLK_EN | Output, PushPull, init low level | |
38 | WIFI_PWRDWN# | Output, PushPull, init low level |
The BOOT_SEL[2:0] Configuration on the carrier board is used to determine the boot device by setting the BOOT_MODE[3:0] pins:
BOOT_SEL[2:0]# | BOOT_MODE[3:0] | Boot Device |
|---|---|---|
0 0 1 | 0 0 1 1 | Carrier SD Card |
1 0 0 | 0 0 0 0 | Boot from Fuse |
1 0 1 | 0 0 0 1 | Serial Download Mode |
1 1 0 | 0 0 1 0 | Module eMMC |