Connect a LVDS Display to a Trizeps
Applies to: Trizeps IV(M), Trizeps IV WL, Trizeps V, Trizeps VI.
See also: Display, bitmapboot.
Schematic
Sample Schematic for a LVDS-Display
Signals
This is the signal-mapping, when using 16Bpp displays. 18Bpp is not supported in the current Windows CE drivers for Trizeps IV(M) and Trizeps V,, because of it many disadavantages compared to the win of 2 extra display-lines. If needed LDD16 and LDD17 are mounting options on pins 150 and 152 of the Trizeps-module Trizeps IV(M),Trizeps V). Trizeps VI can support 16, 18 and 24Bpp.
If more display-lines for each color are availlable for a display, connect the unused LSB-bits to ground. Usually displays also have additional control-lines for backlight and power. See bitmapboot on how to configure those options; i.e. backlight-PWM or power-enable GPIO's.
Signal-Name | SODIMM-Pin | 16Bpp | 18Bpp (see above note) | 24Bpp (Trizeps VI only) |
---|---|---|---|---|
LDD0 | 76 | blue[0] LSB | blue[0] LSB | blue[0] LSB |
LDD1 | 70 | blue[1] | blue[1] | blue[1] |
LDD2 | 60 | blue[2] | blue[2] | blue[2] |
LDD3 | 58 | blue[3] | blue[3] | blue[3] |
LDD4 | 78 | blue[4] MSB | blue[4] | blue[4] |
LDD5 | 72 | green[0] LSB | blue[5] MSB | blue[5] |
LDD6 | 80 | green[1] | green[0] LSB | blue[6] |
LDD7 | 46 | green[2] | green[1] | blue[7] |
LDD8 | 62 | green[3] | green[2] | green[0] LSB |
LDD9 | 48 | green[4] | green[3] | green[1] |
LDD10 | 74 | green[5] MSB | green[4] | green[2] |
LDD11 | 50 | red[0] LSB | green[5] MSB | green[3] |
LDD12 | 52 | red[1] | red[0] LSB | green[4] |
LDD13 | 54 | red[2] | red[1] | green[5] |
LDD14 | 66 | red[3] | red[2] | green[6] |
LDD15 | 64 | red[4] MSB | red[3] | green[7] MSB |
LDD16 | 64 | red[4] MSB | red[4] | red[0] LSB |
LDD17 | 64 | - | red[5] | red[1] |
LDD18 | 176 | - | red[6] MSB | red[2] |
LDD19 | 174 | - | - | red[3] |
LDD20 | 172 | - | - | red[4] |
LDD21 | 170 | - | - | red[5] |
LDD22 | 180 | - | - | red[6] |
LDD23 | 178 | - | - | red[7] MSB |
L_DEN | 44 | Data Enable for active-displays, Bias for passive displays. | ||
L_PCLK | 56 | Pixel Clock | ||
L_HSYNC | 68 | Horizontal Sync | ||
L_VSYNC | 82 | Vertical Sync |