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Table of Contents

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a stereo, hi-fi quality audio-codec.
a FPGA with up to 4300 LUT to convert MIPI-DSI to parallel 24bpp display data and for user defined programmable logic.
a programmable Cortex-M0 Kinetis MCU, capable of realtime processing, reading multiple 16bit analog inputs or usable as resistive touch-controller.
WLAN 802.11 a/b/g/n/ac and Bluetooth BT 4.2 / 5 module

The Trizeps VIII Plus module got a SODIMM200 card edge connector and a 60pin FX11 high-speed board connector. The pinning of both connectors is to a large extent compatible to previous Trizeps modules.

...

Wireless:

WLAN 802.11 a/b/g/n/ac
Bluetooth BT 4.2 and Bluetooth BT 5.0
Micro RF-antenna connector

...

The main connector of the Trizeps VIII Plus is the SODIMM200 connector.
To operate, only VSYS and GND pins need to be connected. Leave unused pins unconnected.
The U14 Board2Board connector can be omitted if the signals are not needed.
J1 and J2 may be used for debugging, programming and testing.
On the bottom side are UFL antenna connectors for the on-board WLAN + Bluetooth BT- chip.

1.1 Pin-description (Primary Function)

...

*4) BT_PCM_IN, BT_PCM_OUT, BT_PCM_SYNC and BT_PCM_CLK are connected to the on-board BluetoothBT-module if it is mounted!

...

Several pins are GPIOs which may be configured for different functions by software.
Please check with the processor datasheet for additional pin-mux information.
An Excel-Sheet with pin-information is available at: https://documentation.seco.com/service/doku.php/service/hardware/module/sodimm200

Notes:

*3) FPGA_CIF_VSYNC, FPGA_CIF_HSYNC, FPGA_CIF_MCLK and FPGA_CIF_PCLK are connected to i.MX 8M Plus pins, if the FPGA is not mounted (RA72).

...

PIN	Name	Alt0	Alt1	Alt2	Alt3	Alt4	Alt5	Alt6	Alt7
2	VIN_AD3	ADC0_SE7 ADC1_SE7 ADC1_DM1	PTE19	SPI0_SIN	UART1_ RTS	I2C0_ SCL		SPI0_ SOUT
4	VIN_AD2	ADC0_SE6 ADC1_SE1 ADC1_DP1	PTE18 LLWI_P20	SPI0_SOUT	UART1_ CTS	I2C0_ SDA		SPI0_ SIN
6	VIN_AD1	ADC0_DM ADC0_SE5 ADC1_SE5	PTE17 LLWI_P19	SPI0_SCK	UART1_ RX	FTM_ CLKIN1		LPTMR0_ ALT3
8	VIN_AD0	ADC0_SE1 ADC0_DP ADC1_SE0	PTE16	SPI0_PCS0	UART1_ TX	FTM_ CLKIN0		FTM_ FLT3
14	TSPX	ADC0_SE8 ADC1_SE8	PTB0 LLWU_P5	I2C0_SCL	FTM1_ CH0			FTM1_ QD_PHA	UART0_ RX
16	TSMX	ADC0_SE9 ADC1_SE9	PTB1	I2C0_SDA	FTM1_ CH1	FTM0_ FLT2	EWM_ IN	FTM1_ QD_PHB	UART0_ TX
18	TSPY	ADC0_SE11 CMP1_IN0	PTC2	SPI0_PCS2	UART1_ CTS	FTM0_ CH1	FTM2_ CH1
20	TSMY	ADC1_SE4 CMP1_IN4 DAC0_OUT	PTE30		FTM0_ CH3		FTM_ CLKIN1
24	SPIN24_ CTS3		PTA4 LLWU_P3		FTM0_ CH1	FTM4_ FLT0	FTM0_ FLT3		NMI_b
26	RESET_IN		PTA20						RESET
97	CAN1_RX		PTE25 LLWU_P21	CAN0 _RX	FTM0_ CH1		I2C0_ SDA	EWM_ IN
99	CAN1_TX		PTE24	CAN0 _TX	FTM0_ CH0		I2C0_ SCL	EWM_ OUT

*) Only MKV11 MCU, not usable with MKV10 MCU.

ADC_SE          Single-Ended ADC
ADC_DM/P      Differential ADC
LLWU              Wakeup-Sources
EWM               External Watchdog Monitor
FTM                 Flexible Timer Module
FTM_CH          Output Channel
FTM_FLT         Fault
FTM_QD_PH   Quadrature Decoder

...

PIN	Name	Type	Voltage	Connected to
1	AUDIO_MIC_OUT	AI		Audio-Codec
3	AUDIO_MIC_GND	AI		Audio-Codec
5	AUDIO_LINEIN_L	AI		Audio-Codec
7	AUDIO_LINEIN_R	AI		Audio-Codec
9	AUDIO_AGND	Analog Audio Ground		Audio-Codec and VREF- of Kinetis MCU
11	AUDIO_AGND	Analog Audio Ground		Audio-Codec and VREF- of Kinetis MCU
13	AUDIO_HEADPHONE_GND	AI		Audio-Codec
15	AUDIO_HEADPHONE_L	AO		Audio-Codec
17	AUDIO_HEADPHONE_R	AO		Audio-Codec
19	UART3_RXD	DI, DIO	NVCC_3V3	i.MX8M and Bluetooth module, if no FPGA (RA600)
21	UART3_TXD	DO, DIO	NVCC_3V3	SPI1_CLK
23	UART1_DTR	DO, DIO	NVCC_3V3	i.MX8M
25	UART1_CTS	DI, DIO	NVCC_3V3	i.MX8M
27	UART1_RTS	DO, DIO	NVCC_3V3	i.MX8M
29	UART1_DSR	DI, DIO	NVCC_3V3	i.MX8M
31	UART1_DCD	DI, DIO	NVCC_3V3	i.MX8M
33	UART1_RXD	DI, DIO	NVCC_3V3	i.MX8M
35	UART1_TXD	DO, DIO	NVCC_3V3	i.MX8M
37	UART1_RI	DI, DIO	NVCC_3V3	i.MX8M
39	GND	Ground
41	GND	Ground
43	SPIN43	DIO	NVCC_3V3	i.MX8M
45	SPIN45	DIO	NVCC_3V3	i.MX8M
47	SD2_CLK	DO, DIO	NVCC_3V3	i.MX8M
49	CIF_D0	DI, DIO	NVCC_3V3	i.MX8M
51	SD2_DATA3	DIO	NVCC_3V3	i.MX8M
53	CIF_D1	DI, DIO	NVCC_3V3	i.MX8M
55	SPIN55	DIO	NVCC_3V3	i.MX8M
57	SAI1_RXD2	DI, DIO	NVCC_3V3	i.MX8M
59	SD2_DET	DI, DIO	NVCC_3V3	i.MX8M
61	SAI1_RXD3	DI, DIO	NVCC_3V3	i.MX8M
63	SAI1_RXD4	DI, DIO	NVCC_3V3	i.MX8M
65	SAI1_RXD5	DI, DIO	NVCC_3V3	i.MX8M
67	SAI1_RXD6	DI, DIO	NVCC_3V3	i.MX8M
69	LED_GPIO, PWM4	DO, DIO	NVCC_3V3	i.MX8M
71	SAI1_RXD7	DI, DIO	NVCC_3V3	i.MX8M
73	CIF_D8	DI, DIO	NVCC_3V3	i.MX8M
75	CIF_D9	DI, DIO	NVCC_3V3	i.MX8M
77	BACKLIGHT_PWM	DO, DIO	NVCC_3V3	i.MX8M
79	SPIN79	DI, DIO	NVCC_3V3	i.MX8M
81	SD2_DATA1	DIO	NVCC_3V3	i.MX8M
83	GND	Ground
85	SD2_DATA2	DIO	NVCC_3V3	i.MX8M
87	RESET_OUT	DO	NVCC_3V3	FPGA + i.MX8M + Kinetis MCU
89	+3V3_AUX (NVCC_3V3)	PO	+3V3	NVCC_3V3
91	+3V3_AUX (NVCC_3V3)	PO	+3V3	NVCC_3V3
93	-
95	SPIN95	DIO	NVCC_3V3	i.MX8M
97	CAN1_RX	DI, DIO	NVCC_3V3	i.MX8M
99	CAN1_TX	DO, DIO	NVCC_3V3	i.MX8M
101	CAN2_RX	DI, DIO	NVCC_3V3	i.MX8M
103	CAN2_TX	DO, DIO	NVCC_3V3	i.MX8M
105	QSPI_SCLK (CS1)	DO, DIO	NVCC_3V3	i.MX8M
107	QSPI_SS0 ( CS3)	DO, DIO	NVCC_3V3	i.MX8M
109	GND	Ground
111	QSPI_DATA0 (A00)	DIO	NVCC_3V3	i.MX8M
113	QSPI_DATA1 (A01)	DIO	NVCC_3V3	i.MX8M
115	PCIE_CLKREQ	DIO	NVCC_3V3	i.MX8M
117	QPSPI_DATA2 (A03)	DIO	NVCC_3V3	i.MX8M
119	QSPI_DATA3 (A04)	DIO	NVCC_3V3	i.MX8M
121	SPIN121 (A05)	DIO	NVCC_3V3	i.MX8M
123	CSI1_PWDN	DO, DIO	NVCC_3V3	i.MX8M
125	CSI_RESET	DO, DIO	NVCC_3V3	i.MX8M
127	USB1_PEN	DO, DIO	NVCC_3V3	i.MX8M
129	USB2_PEN	DO, DIO	NVCC_3V3	i.MX8M
131	USB2_OC	DI, DIO	NVCC_3V3	i.MX8M
133	USB1_OC	DI, DIO	NVCC_3V3	i.MX8M
135	USB1_VBUS	DI (PO)	+5V	i.MX8M
137	USB1_ID	DI	NVCC_3V3	i.MX8M
139	USB1_DP	DDIO	NVCC_3V3	i.MX8M
141	USB1_DN	DDIO	NVCC_3V3	i.MX8M
143	USB2_DP	DDIO	NVCC_3V3	i.MX8M
145	USB2_DN	DDIO	NVCC_3V3	i.MX8M
147	GND	Ground
149	HDMI_DDC_SDA	DIO	NVCC_3V3	i.MX8M
151	USB2_TX_P	DDIO	NVCC_3V3	i.MX8M
153	USB2_TX_N	DDIO	NVCC_3V3	i.MX8M
155	USB2_RX_P	DDIO	NVCC_3V3	i.MX8M
157	USB2_RX_N	DDIO	NVCC_3V3	i.MX8M
159	SPDIF_IN	DI, DIO	NVCC_3V3	i.MX8M
161	SPDIF_OUT	DO, DIO	NVCC_3V3	i.MX8M
163	SPDIF_EXT_CLK	DI, DIO	NVCC_3V3	i.MX8M
165	LED_WL	DO	NVCC_3V3	Wifi
167	LED_BT	DO	NVCC_3V3	BT
169	VDD_ENET_IO	PO	Ethernet signal IO voltage
171	ETH_LED_SPEED1000	OD	NVCC_3V3	Gbit Ethernet-Phy
173	ETH_TRX2_N	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
175	ETH_TRX2_P	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
177	ETH_TRX3_N	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
179	ETH_TRX3_P	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
181	GND	Ground
183	ETH_LED_LINK_AKT	OD	NVCC_3V3	Gbit Ethernet-Phy
PIN	Name	Type	Voltage	Connected to
185	ETH_LED_SPEED100	OD	NVCC_3V3	Gbit Ethernet-Phy
187	ETH_TRX0_N	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
189	ETH_TRX0_P	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
191	ETH_GND	Ground
193	ETH_TRX1_N	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
195	ETH_TRX1_P	DDIO	VDD_ENET_IO	Gbit Ethernet-Phy
197	GND	Ground
199	GND	Ground
2	VIN_AD3	AI, DIO	VCC_SNVS	Kinetis MCU, PTE16: ADC0_SE1
4	VIN_AD2	AI, DIO	VCC_SNVS	Kinetis MCU, PTE17: ADC0_SE5
6	VIN_AD1	AI, DIO	VCC_SNVS	Kinetis MCU, PTE18: ADC0_SE6
8	VIN_AD0	AI, DIO	VCC_SNVS	Kinetis MCU, PTE19: ADC0_SE7
10	AUDIO_VDDA	PI	AUDIO_VDD	Audio-Codec and VREF+ of Kinetis MCU
12	AUDIO_VDD_SPEAKER	PI	VDD_SPEAKER	Audio-Codec and VREF+ of Kinetis MCU
14	TSPX	AI, DIO	VCC_SNVS	Kinetis MCU, PTB0: ADC1_SE8
16	TSMX	AI, DIO	VCC_SNVS	Kinetis MCU, PTB1: ADC1_SE9
18	TSPY	AI, DIO	VCC_SNVS	Kinetis MCU, PTC2: ADC0_SE11, CMP1_IN0
20	TSMY	AI, DIO	VCC_SNVS	Kinetis MCU, PTE30: ADC1_SE4, CMP1_IN4
22	SPIN22_RTS3	DO, DIO	NVCC_3V3	i.MX8M and Bluetooth BT module, if no FPGA (RA600)
24	SPIN24_CTS3	DI, DIO	NVCC_3V3 VCC_SNVS	Kinetis MCU, i.MX8M and Bluetooth BT module, if no FPGA (RA600) optional ONOFF (R627), optional BOOT_MODE0 (R628)
26	RESET_IN	DI	VCC_SNVS	Kinetis MCU and Reset-Circuit
28	SPEAKER_P	AO	VDD_SPEAKER	Audio-Codec
30	SPEAKER_N	AO	VDD_SPEAKER	Audio-Codec
32	UART2_CTS	DI, DIO	NVCC_3V3	i.MX8M
34	UART2_RTS	DO, DIO	NVCC_3V3	i.MX8M
36	UART2_RXD	DI, DIO	NVCC_3V3	i.MX8M
38	UART2_TXD	DO, DIO	NVCC_3V3	i.MX8M
40	VSYS	PI	+3V3/+5V
42	VSYS	PI	+3V3/+5V
44	LCD_DE	DO, DIO	NVCC_3V3	FPGA
46	LCD_D07	DO, DIO	NVCC_3V3	FPGA
48	LCD_D09	DO, DIO	NVCC_3V3	FPGA
50	LCD_D11	DO, DIO	NVCC_3V3	FPGA
52	LCD_D12	DO, DIO	NVCC_3V3	FPGA
54	LCD_D13	DO, DIO	NVCC_3V3	FPGA
56	LCD_PCLK	DO, DIO	NVCC_3V3	FPGA
58	LCD_D03	DO, DIO	NVCC_3V3	FPGA
60	LCD_D02	DO, DIO	NVCC_3V3	FPGA
62	LCD_D08	DO, DIO	NVCC_3V3	FPGA
64	LCD_D15	DO, DIO	NVCC_3V3	FPGA
66	LCD_D14	DO, DIO	NVCC_3V3	FPGA
68	LCD_HSYNC	DO, DIO	NVCC_3V3	FPGA
70	LCD_D01	DO, DIO	NVCC_3V3	FPGA
72	LCD_D05	DO, DIO	NVCC_3V3	FPGA
74	LCD_D10	DO, DIO	NVCC_3V3	FPGA
76	LCD_D00	DO, DIO	NVCC_3V3	FPGA
78	LCD_D04	DO, DIO	NVCC_3V3	FPGA
80	LCD_D06	DO, DIO	NVCC_3V3	FPGA
82	LCD_VSYNC	DO, DIO	NVCC_3V3	FPGA
84	VSYS	PI	+3V3/+5V
86	CIF_VSYNC SPI2_SS0	DO, DIO	NVCC_3V3	FPGA, RA3 optional route to i.MX8M SPI2_SS0
88	CIF_MCLK SPI2_SCLK	DO, DIO	NVCC_3V3	FPGA, RA3 optional route to i.MX8M SPI2_SCLK
90	CIF_PCLK SPI2_MISO	DO, DIO	NVCC_3V3	FPGA, RA3 optional route to i.MX8 SPI2_MISO
92	CIF_HSYNC SPI2_MOSI	DO, DIO	NVCC_3V3	FPGA, RA3 optional route to i.MX8 SPI2_MOSI
94	I2C1_SCL	DO, DIO	NVCC_3V3	i.MX8M
96	I2C1_SDA	DO, DIO	NVCC_3V3	i.MX8M
98	SPIN98	DIO	NVCC_3V3	i.MX8M
100	DISPLAY_ENABLE	DO, DIO	NVCC_3V3	i.MX8M
102	AUDIO_ENABLE	DO, DIO	NVCC_3V3	i.MX8M
104	SPIN104	DIO	NVCC_3V3	i.MX8M
106	VSD_3V3	PO	+3V3 (switchable)
108	VSYS	PI	+3V3/+5V
110	SAI1_TXD0	DO, DIO	NVCC_3V3	i.MX8M
112	SAI1_TXD1	DO, DIO	NVCC_3V3	i.MX8M
114	SAI1_TXD2	DO, DIO	NVCC_3V3	i.MX8M
116	SAI1_TXD3	DO, DIO	NVCC_3V3	i.MX8M
118	SAI1_TXD4	DO, DIO	NVCC_3V3	i.MX8M
120	SAI1_TXD5	DO, DIO	NVCC_3V3	i.MX8M
122	SAI1_TXD6	DO, DIO	NVCC_3V3	i.MX8M
124	SAI1_TXD7	DO, DIO	NVCC_3V3	i.MX8M
126	SAI1_TXFS	DO, DIO	NVCC_3V3	i.MX8M
128	SAI1_TXC	DO, DIO	NVCC_3V3	i.MX8M
130	HDMI_DDC_SCL	DO,DIO	NVCC_3V3	i.MX8M
132	-
134	SPIN134	DIO	NVCC_3V3	i.MX8M
136	SPIN136	DIO	NVCC_3V3	i.MX8M
138	USB1_RX_P	DDIO	NVCC_3V3	i.MX8M
140	USB1_RX_N	DDIO	NVCC_3V3	i.MX8M
142	USB1_TX_P	DDIO	NVCC_3V3	i.MX8M
144	USB1_TX_N	DDIO	NVCC_3V3	i.MX8M
146	BT_PCM_IN	DI, DIO	NVCC_3V3	i.MX8M and BluetoothBT-Module
148	VSYS	PI	+3V3/+5V
150	LCD_D16	DO, DIO	NVCC_3V3	FPGA
152	LCD_D17	DO, DIO	NVCC_3V3	FPGA
154	PCIE_WAKE	DO, DIO	NVCC_3V3	i.MX8M
156	VDD_FPGA_MIPI	PO	+2V5 (programmable)
158	PCIE_REFCLK_N	DDO	NVCC_3V3	i.MX8M
160	PCIE_REFCLK_P	DDO	NVCC_3V3	i.MX8M
162	PCIE_TXN_P	DDO	NVCC_3V3	i.MX8M
164	PCIE_TXN_N	DDO	NVCC_3V3	i.MX8M
166	PCIE_RXN_P	DDI	NVCC_3V3	i.MX8M
168	PCIE_RXN_N	DDI	NVCC_3V3	i.MX8M
170	LCD_D21 SD3_DATA0	DO, DIO	NVCC_3V3	FPGA and i.MX8M
172	LCD_D20 SD3_DATA1	DO, DIO	NVCC_3V3	FPGA and i.MX8M
174	LCD_D19 SD3_DATA2	DO, DIO	NVCC_3V3	FPGA and i.MX8M
176	LCD_D18 SD3_DATA3	DO, DIO	NVCC_3V3	FPGA and i.MX8M
178	LCD_D23 SD3_CLK	DO, DIO	NVCC_3V3	FPGA and i.MX8M
180	LCD_D22 SD3_CMD	DO, DIO	NVCC_3V3	FPGA and i.MX8M
182	VSYS	PI	+3V3/+5V
184	BT_PCM_OUT	DO, DIO	NVCC_3V3	i.MX8M and BluetoothBT-Module
186	BT_PCM_CLK	DO, DIO	NVCC_3V3	i.MX8M and BluetoothBT-Module
188	BT_PCM_SYNC	DO, DIO	NVCC_3V3	i.MX8M and BluetoothBT-Module
190	SD2_CMD	DO, DIO	NVCC_3V3	i.MX8M
192	SD2_DATA0	DIO	NVCC_3V3	i.MX8M
194	I2C2_SDA	DIO	NVCC_3V3	i.MX8M
196	I2C2_SCL	DIO	NVCC_3V3	i.MX8M
198	VSYS	PI	+3V3/+5V
200	VCC_SNVS	PI	+3V3 (Must be applied first)

...

Name	Description
UART1_TXD	UART1 transmit output
UART1_RXD	UART1 receive input
UART1_RTS	UART1 request to send output
UART1_CTS	UART1 clear to send input
UART1_DTR	UART1 data terminal ready output; A GPIO is used to emulate this function.
UART1_DSR	UART1 data set ready input; A GPIO is used to emulate this function.
UART1_DCD	UART1 data carrier detect input; A GPIO is used to emulate this function.
UART1_RI	UART1 ring indicator input; A GPIO is used to emulate this function.
UART2_TXD	UART2 transmit output
UART2_RXD	UART2 receive input
UART2_RTS	UART2 request to send output. This pin can be configured to be UART4_RXD.
UART2_CTS	UART2 clear to send input. This pin can be configured to be UART4_TXD.
UART3_TXD	UART3 transmit output; This signal is routed through the FPGA. If Trizeps module is without FPGA, there is a mounting option to either route UART3 to the SODIMM or to the bluetoothBT-module.
UART3_RXD	UART3 receive input; This signal is routed through the FPGA. If Trizeps module is without FPGA, there is a mounting option to either route UART3 to the SODIMM or to the bluetoothBT-module.
SPIN22_RTS3	UART3 request to send output; This signal is routed through the FPGA. If Trizeps module is without FPGA, there is a mounting option to either route UART3 to the SODIMM or to the bluetoothBT-module. The SODIMM200-standard does not specify a RTS-pin for UART3.
SPIN24_CTS3	UART3 clear to send input; This signal is routed through the FPGA. If Trizeps module is without FPGA, there is a mounting option to either route UART3 to the SODIMM or to the bluetoothBT-module. The SODIMM200-standard does not specify a CTS-pin for UART3.
UART1_DSR	UART1 data set ready input; A GPIO is used to emulate this function.

...

Name	Description
SAI1_TXC	Transmit Bit Clock
SAI1_TXFS	Transmit Frame Sync
SAI1_TXD0	Serial transmit data channel 0
SAI1_TXD1	Serial transmit data channel 1
SAI1_TXD2	Serial transmit data channel 2
SAI1_TXD3	Serial transmit data channel 3
SAI1_TXD4	Serial transmit data channel 4
SAI1_TXD5	Serial transmit data channel 5
SAI1_TXD6	Serial transmit data channel 6
SAI1_TXD7	Serial transmit data channel 7
SAI1_RXC	Receive Bit Clock
SAI1_RXFS	Receive Frame Sync
SAI1_MCLK	Audio Master Clock
SAI1_RXD0	Serial receive data channel 0
SAI1_RXD1	Serial receive data channel 1
SAI1_RXD2	Serial receive data channel 2
SAI1_RXD3	Serial receive data channel 3
SAI1_RXD4	Serial receive data channel 4
SAI1_RXD5	Serial receive data channel 5
SAI1_RXD6	Serial receive data channel 6
SAI1_RXD7	Serial receive data channel 7
BT_PCM_CLK	Bluetooth BT PCM clock (SAI3_RXC) Optional connected to bluetooth BT-module.
BT_PCM_SYNC	Bluetooth PCM Sync (SAI3_RXFS) Optional connected to bluetooth BT-module.
BT_PCM_IN	Bluetooth PCM In (SAI3_TXD) Optional connected to bluetooth BT-module.
BT_PCM_OUT	Bluetooth PCM Out (SAI3_RXD) Optional connected to bluetooth BT-module.

2.8 SD-Card

The SD-Card Interface may be used to connect a SD-Card, eMMC or SDIO-hardware to the Trizeps module.

...

The Trizeps VIII Plus may be equipped with a HD Wireless SPB228, Silex SX-PCEAC2 or AzureWave CM276NF module.
The antennas are connected directly to the module.

Name	Description
BT_LED	Bluetooth BT active LED

2.16 Audio

The Trizeps VIII Plus uses a WM8962 audio-codec. (Other codec-options available on request)

...

Article number 00…	Trizeps VIII Plus
66B21.E0912. H00S00	Trizeps VIII Plus EC/ Quad/IT1600/R2G/EMMC8G/ ETH/COD/RoHS (Extended Consumer Temperature -25 to 85°C, i.MX 8M Plus Quad Core, IT 1.6 GHz, 2 GB RAM, 8 GB eMMC, Ethernet, Codec)
66A21.C2B32. H00S00	Trizeps VIII Plus CT/Quad/ C01800/R2G/EMMC8G/FPGA/ ETH/COD/MCU/WB/RoHS (Consumer Temperature 0 to 70°C, i.MX 8M Plus Quad Core, C0 1.8 GHz, 2 GB RAM, 8 GB eMMC, FPGA LF21, Ethernet, Codec, Kinetis MCU, WLAN, BluetoothBT)

Other versions on request

...

Versions Compared

Old Version 17

New Version 18

Key

Wireless:

1.1 Pin-description (Primary Function)

2.8 SD-Card

2.16 Audio