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Default Firmware | ssh://git@gitlab.keith-koep.com:30001/tr8firmware/tr8_mcu.git | tr8plus |
The on-board Cortex M0+ Kinetis MCU on Trizeps8Plus type modules is used for following functions: resistive touch, adc inputs, gpios and reset control with bootmode selection. It may be also used for realtime processing and power-management.
It is capable of reading multiple 16bit analog inputs (i.e. to emulate a resistive touch controller).
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I2C-Address: 0x10 (7bit) | ||||||||
---|---|---|---|---|---|---|---|---|
Reg. | Name | Access | Description | Default-Value | ||||
0x01 | REG_ID | read | ID-Register | 0x61 | ||||
0x02 | REG_CONTROL | write |
| - | ||||
0x04 | REG_PIN_CONFIG | write |
| - | ||||
0x05 | REG_PIN_SET | write |
| - | ||||
0x06 | REG_PIN_GET |
|
| - | ||||
0x10 | ADC_CONFIG | write |
| 2 | ||||
0x11 | ADC |
|
| - | ||||
0x12 | ADC_LSB | read | [7:0] of value | - | ||||
0x13 | ADC_LSB | read | [15:8] of value | - | ||||
0x20 | TOUCH_CONFIG | write |
| - | ||||
0x21 | TOUCH_WAITTIME | write | <mS> Time for voltages to settle | 2 | ||||
0x22 | TOUCH_XSCALE_LSB |
|
| (800) | ||||
0x23 | TOUCH_XSCALE_MSB |
|
| (800) | ||||
0x24 | TOUCH_YSCALE_LSB |
|
| (480) | ||||
0x25 | TOUCH_YSCALE_MSB |
|
| (480) | ||||
0x26 | TOUCH_XMIN_LSB |
|
| - | ||||
0x27 | TOUCH_XMIN_MSB |
|
| - | ||||
0x28 | TOUCH_YMIN_LSB |
|
| - | ||||
0x29 | TOUCH_YMIN_MSB |
|
| - | ||||
0x2A | TOUCH_XMAX_Z_LSB |
|
| - | ||||
0x2B | TOUCH_XMAX_Z_MSB |
|
| - | ||||
0x2C | TOUCH_YMAX_LSB |
|
| - | ||||
0x2D | TOUCH_YMAX_MSB |
|
| - | ||||
0x2E | TOUCH_AVERAGE | write | Number of samples to get for each position-measurement | 20 | ||||
0xF0 - 0xFF | VERSION | read | Zero terminated version string |
Alternate Function | |||||||||
---|---|---|---|---|---|---|---|---|---|
SODIMM Pin | Name | Alt0 | Alt1 | Alt2 | Alt3 | Alt4 | Alt5 | Alt6 | Alt7 |
2 | VIN_AD3 | ADC0_SE7, ADC1_SE7, ADC1_DM1 | PTE19 | SPI0_SIN | UART1_RTS | I2C0_SCL | SPI0_SOUT | ||
4 | VIN_AD2 | ADC0_SE6, ADC1_SE1, ADC1_DP1 | PTE18, LLWI_P20 | SPI0_SOUT | UART1_CTS | I2CS0_SDA | SPI0_SON | ||
6 | VIN_AD1 | ADC0_DM1, ADC0_SE5, ADC1_SE5 | PTE17, LLWU_P19 | SPI0_SCK | UART1_RX | FTM_CLKIN1 | LTMR0_ALT3 | ||
8 | VIN_AD0 | ADC0_SE1, ADC0_DP1, ADC1_SE0 | PTE16 | SPI0_PCS0 | UART1_TX | FTM_CLKIN0 | FTM0_FLT3 | ||
14 | TSPX | ADC0_SE8, ADC1_SE8 | PTB0, LLWU_P5 | I2C0_SCL | FTM1_CH0 | FTM1_QD_PHA | UART0_RX | ||
16 | TSMX | ADC0_SE9, ADC1_SE9 | PTB1 | I2C0_SDA | FTM1_CH1 | FTM0_FLT2 | EWM_IN | FTM1_QD_PHB | UART0_TX |
18 | TSPY | ADC0_SE11, CMP1_IN0 | PTC2 | SPI0_PCS2 | UART1_CTS | FTM0_CH1 | FTM2_CH1 | ||
20 | TSMY | ADC1_SE4, CMP1_IN4, DAC0_OUT | PTE30 | FTM0_CH3 | FTM_CLKIN1 | ||||
24 | SPIN24_CTS3 | PTA4/LLWU_P3 | FTM0_CH1 | FTM0_FLT3 | NMI_b | ||||
75 | CIF_D9 | PTE25 | FTM0_CH1 | I2C0_SDA | EWM_IN | ||||
87 | nRESET_OUT | PTC5, LLWU_P9 | SPI0_SCK | LPTMR0_ALT2 | CMP0_OUT | FTM0_CH2 | |||
250 | nRF_DISABLE | PTE24 | FTM0_CH0 | I2C0_SCL | EWM_OUT_b | ||||
251 | nPCIE_RESET | ADC1_SE11 | PTC1/LLWU_P6 | SPI0_PCS3 | UART1_RTS_b | FTM0_CH0 | FTM2_CH0 | ||
252 | nWL_POWERDOWN | PTC5/LLWU_P9 | SPI0_SCK | LPTMR0ALT2 | CMP0_OUT | FTM0_CH2 |
...