(This page is currently under construction and the following informations are preliminary)
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Generals
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The Maury MAURY is powered by NXP i.MX 93 processor, which is designed to meet the latest market requirements of connected streaming audio/video devices, scanning/imaging devices and various devices demanding high-performance and low-power.
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eMMC (up to 64 GByte)
2x 1Gbit Ethernet
TPM
USB 2.0 Hub (4x)
eDP
RTC
EEPROM
WLAN 802.11 a/b/g/n/ac and Bluetooth BT 5.3 Combo module (M.2 1216)
SMARC Standard
The SMARC (“Smart Mobility ARChitecture”) is a versatile small form factor computer Module definition targeting applications that require low power, low costs, and high performance. The Modules will typically use ARM SOCs similar or the same as those used in many familiar devices such as tablet computers and smart phones. Alternative low power SOCs and CPUs, such as tablet oriented x86 devices and other RISC CPUs may be used as well.
The Module power envelope is typically under 6W although designs up to about 15W are possible.
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Features and Interfaces
Features
Processor:
NXP i.MX 93 ARM® Dual Cortex-A55 @ 1.7GHz (consumer), 1.5GHz (industrial)
NXP i.MX 93 ARM® Cortex-M33 @ 250MHz
NXP i.MX 93 ARM® EthosTM U-65 microNPU
Memory:
Up to 2GByte of 16-bit LPDDR4-4000
Storage:
Up to 64 GByte eMMC
Wireless:
WLAN 802.11 a/b/g/n/ac
Bluetooth 5.3
MicroRF-antenna connector
Power:
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Dimensions:
(Length x Width x Height): 82.0 x 50.0 x 5.4 mm
Interfaces / Signals accessible over connector:
Power Supply through 5.0VDC +- 5%, +3.2V_RTC
LVDS single channel up to 720p60
MIPI_DSI or eDP interface (factory alternatives) up to 1080p60
SD 4-bit interface (boot device)
2x Gigabit Ethernet interfaces
1x USB 2.0 OTG port
up to 4x USB 2.0 using optional internal 2.0 Hub
1x I2S port
2x UART (4-wires)
2x UART (2-wires)
2x CAN interfaces
12x GPIOs
1x MIPI_CSI 2 Lanes Camera interface
1x General Purpose I2C Bus
2x PWM ports
TPM
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1 Pin-description
The main connector of the Maury is the SMARC connector.
J400 may be used for debugging, programming and testing.
On the top side are UFL antenna connectors for the on-board WLAN + Bluetooth chip.
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Figure: Connectors
1.1 Pin Description (Primary function)
The i.MX 93 processor is a highly configurable device, where each pin may have multiple different functions. Please view chapter “1.2 Pin-Mux Information” for details on how these pins may be configured by software.
J1600: SMARC connector:
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J400: i.MX 93 JTAG connector:
This flex-cable connector uses the Seco JTAG connector standard.
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1.2 Pin-Mux information
Several pins are GPIOs which may be configured for different functions by software. Please check with the processor datasheet for additional pin-mux information.
1.2.1 i.MX 93 pins
The i.MX 93 pins got different functions. Only the more common used are listed.
add table!!!
1.3 Electrical pin information
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PI:
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Power Input
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DO:
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Digital Output
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PO:
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Power Output
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DIO:
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Digital Input/Output
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DDI:
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Differential Input
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AI:
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Analog Input
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DDO:
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Differential Output
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AO:
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Analog Output
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DDIO:
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Differential Input/Output
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DI:
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Digital Input
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OD
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Open-Drain Output
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PD:
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Pull-Down
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(PDp: Pull-Down, Pull-behavior can be changed by software)
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PU:
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Pull-Up
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PUp: Pull-Up, Pull-behavior can be changed by software
If two “types” are specified, the first value determines the type of primary function.
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2. Interfaces
This chapter includes a short description of all interfaces of the Maury. Please consult the processor datasheet for detailed information.
2.1 Power Supply
The Maury can be supplied by a single +5.0V power supply.
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Name
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Description
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5V_SLEEP
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5V power input. This supply controls the STM32. STM32 MCU controls reset and power to the i.MX 93 processor.
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GND
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Ground input
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VDD_RTC
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3V power supply to supply the RTC on the Maury
2.2 Control signals
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Name
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Description
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RESET_IN#
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Negated reset input. 0: reset device, 1: normal operation
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RESET_OUT#
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Negated reset output. 0: device in reset, 1: normal operation (active low)
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BOOT_SEL[2…0]
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tell the module what physical device to do a BCT boot from (see table xxx below)
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STM32_RST#
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Negated reset input for STM32. 0: reset STM32, 1: normal operation (active low)
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POWER_BTN#
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Carrier based power button (active low)
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WDT_TIME_OUT#
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Watchdog output (active low)
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LID#
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Lid open/close indication input (active low)
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SLEEP#
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Sleep indicator input (active low)
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VIN_PWR_BAD#
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Power status input. 0: Carrierrboard power is not ready to support Maury, 1: Carrierboard power is ready to support Maury (active low)
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CHARGING#
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Input, held low by carrier during battery scharging, float when charging is complete (active low)
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CHARGER_PRSNT#
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Input, held low by Carrier if DC input for battery charger is present (active low)
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CARRIER_STBY#
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Power status output. If the power save state standby
mode is implemented at the Carrier the runtime voltage rails are enabled with this control signal from the module. The module drives this signal high to enable runtime power rails. If no separate standby mode is implemented all rails are enabled with CARRIER_PWR_ON signal. This signal is driven high by the module at runtime. (active low)
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CARRIER_PWR_ON
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Power status output. It is a signal to Carrier that the
Carrier specific power supplies that shall be powered during standby may be enabled. If standby power save state is implemented at the Carrier this signal enables the standby voltage rails.
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FORCE_RECOV#
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Primary boot media can be re-initialized (active low)
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BATLOW#
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Input, battery low indication to Module. Carrier to float the line in inactive state (active low)
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TEST#
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Negated test input of STM32. 0: device in programming mode, 1: normal operation (active low)
Table xxx: Boot select pins
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BOOT_SEL2#
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BOOT_SEL1#
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BOOT_SEL0#
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Boot Source
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0
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GND
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GND
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GND
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Carrier SATA
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1
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GND
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GND
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Float
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Carrier SD Card
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2
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GND
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Float
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GND
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Carrier eSPI
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3
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GND
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Float
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Float
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Carrier SPI
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4
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Float
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GND
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GND
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Module device (NAND, NOR)
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5
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Float
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GND
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Float
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Remote boot (GBE, serial)
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6
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Float
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Float
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GND
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Module eMMC Flash
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7
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Float
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Float
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Float
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Module SPI
2.3 UART
The i.MX 93 provides 4 Universal Asynchronous Receiver/Transmitter. With a transceiver these signals can be converted to RS232, RS485 or IrDA.
Following UART ports are accessible through the SMARC connector:
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Name
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Description
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SER0_TX
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Serial 0 transmit output
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SER0_RX
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Serial 0 receive input
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SER0_RTS#
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Serial 0 request to send output (active low)
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SER0_CTS#
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Serial 0 clear to send input (active low)
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SER1_TX
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Serial 1 transmit output
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SER1_RX
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Serial 1 receive input
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SER2_TX
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Serial 2 transmit output
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SER2_RX
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Serial 2 receive input
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SER2_RTS#
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Serial 2 request to send output (active low)
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SER2_CTS#
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Serial 2 clear to send input (active low)
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SER3_TX
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Serial 3 transmit output
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SER3_RX
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Serial 3 receive input
Baudrate: High-speed TIA/EIA-232-F compatible, up to 1Mbit/s, IrDA-compatible, up to 115.2 Kbit/s
Data-Bits: 7 or 8 bits (RS232) or 9 bit (RS485)
Stop Bits: 1, 2
Parity: None, Even, Odd
Features: Hardware flow control (RTS, CTS)
2.4 SPI
The serial peripheral interface is a programmable synchronous serial port, which may be used to connect to a multiple of different peripherals.
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Name
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Description
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SPIO_CS0#
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SPI 0 slave select
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SPI0_CK
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SPI 0 clock
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SPI0_DIN
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SPI 0 data in
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SPI0_DO
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SPI 0 data out
Speed: up to xxx MHz
2.5 I2C
The Inter-Integrated Circuit (I2C ) provides functionality of a standard I2C master and slave.
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Name
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Description
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I2C1_SCL
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I2C1 clock
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I2C1_SDA
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I2C1 data
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I2C3_SCL
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I2C3 clock
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I2C3_SDA
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I2C3 data
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I2C_PM_CK
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I2C PM clock
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I2C_PM_DAT
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I2C PM data
Speed: Standard mode, up to 100kbit/s
Fast mode, up to 400 kbit/s
Features: Multimaster operation.
I2C Bus specification version 2.1
2.6 I2S
The Inter-IC sound interface provides a synchronous audio interface (SAI) and is used to connect to audio codecs.
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Name
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Description
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I2S0_LRCK
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I2S0 Left & Right Synchronisation Clock
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I2S0_SDOUT
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I2S0 Digital Audio Output
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I2S0_SDIN
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I2S0 Digital Audio Input
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I2S0_CK
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I2S0 Digital Audio Clock
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I2S2_LRCK
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I2S2 Left & Right Synchronisation Clock
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I2S2_SDOUT
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I2S2 Digital Audio Output
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I2S2_SDIN
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I2S2 Digital Audio Input
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I2S2_CK
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I2S2 Digital Audio Clock
2.7 SD-Card
The SD-Card interface may be used to connect a SD-Card, eMMC or SDIO hardware.
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Name
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Description
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SDIO_CMD
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SDIO command output
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SDIO_CD#
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SDIO card detect input (active low)
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SDIO_CK
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SDIO clk output
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SDIO_PWR_EN_3V3
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SDIO Power enable signal
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SDIO_D0
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SDIO data bit 0
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SDIO_D1
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SDIO data bit 1
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SDIO_D2
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SDIO data bit 2
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SDIO_D3
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SDIO data bit 3
Speed: Card bus clock frequency up to 208 MHz
Features: Conforms to the SD Host Controller Standard Specification version 3.0.
Compatible with the MMC System Specification version 4.2/4.3/4.4/4.41/5.0.
Compatible with the SD Memory Card Specification version 3.0 and supports the Extended Capacity SD Memory Card
Compatible with the SDIO Card Specification version 3.0
2.8 USB
In the standard configuration, the Maury offers two USB 2.0 ports, which are routed to the SMARC connector. As an assembly option, a quad USB hub is possible, so that up to five USB ports are possible on the SMARC connector.
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Name
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Description
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USB0_DP
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USB0 data (positive)
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USB0_DN
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USB0 data (negative)
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USB0_EN_OC#
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USB0 power enable output and overcurrent input (active low)
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USB0_VBUS_DET
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USB0 VBUS detection
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USB0_OTG_ID
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USB0 ID detect
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USB1_EXT_DP
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USB1 data (positive)
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USB1_EXT_DN
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USB1 data (negative)
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USB1_EN_OC#
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USB1 power enable output and overcurrent input (active low)
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USB2_DP
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USB2 data (positive) (optional)
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USB2_DN
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USB2 data (negative) (optional)
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USB2_EN_OC#
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USB2 power enable output and overcurrent input (active low) (optional)
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USB3_DP
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USB3 data (positive) (optional)
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USB3_DN
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USB3 data (negative) (optional)
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USB3_EN_OC#
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USB3 power enable output and overcurrent input (active low) (optional)
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USB4_DP
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USB4 data (positive) (optional)
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USB4_DN
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USB4 data (negative) (optional)
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USB4_EN_OC#
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USB4 power enable output and overcurrent input (active low) (optional)
Speed: High-speed 480Mbit/s
Full-speed 12Mbit/s
Low-speed 1.5Mbit/s
Features: Complies with USB specification rev. 2.0
2.9 Ethernet
The Maury uses two Realtek RTL8211 integrated 10/100/1000 Mbps Ethernet Transceiver to interface with the i.MX 93 RGMII.
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Name
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Description
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GBE0_MDI0_P
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ETH port 0 differential pair 0 positive signal
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GBE0_MDI0_N
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ETH port 0 differential pair 0 negative signal
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GBE0_MDI1_P
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ETH port 0 differential pair 1 positive signal
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GBE0_MDI1_N
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ETH port 0 differential pair 1 negative signal
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GBE0_MDI2_P
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ETH port 0 differential pair 2 positive signal
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GBE0_MDI2_N
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ETH port 0 differential pair 2 negative signal
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GBE0_MDI3_P
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ETH port 0 differential pair 3 positive signal
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GBE0_MDI3_N
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ETH port 0 differential pair 3 negative signal
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GBE0_LINK100#
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ETH port 0 Link Speed indication LED for GBE0 100Mbps (active low)
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GBE0_LINK1000#
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ETH port 0 Link Speed indication LED for GBE0 1000Mbps (active low)
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GBE0_LINK_ACT#
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ETH port 0 Link / Activity Indication LED driven Low on Link (10, 100 or 1000Mbps) Blinks on Activity (active low)
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GBE1_MDI0_P
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ETH port 1 differential pair 0 positive signal
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GBE1_MDI0_N
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ETH port 1 differential pair 0 negative signal
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GBE1_MDI1_P
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ETH port 1 differential pair 1 positive signal
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GBE1_MDI1_N
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ETH port 1 differential pair 1 negative signal
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GBE1_MDI2_P
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ETH port 1 differential pair 2 positive signal
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GBE1_MDI2_N
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ETH port 1 differential pair 2 negative signal
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GBE1_MDI3_P
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ETH port 1 differential pair 3 positive signal
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GBE1_MDI3_N
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ETH port 1 differential pair 3 negative signal
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GBE1_LINK100#
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ETH port 1 Link Speed indication LED for GBE0 100Mbps (active low)
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GBE1_LINK1000#
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ETH port 1 Link Speed indication LED for GBE0 1000Mbps (active low)
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GBE1_LINK_ACT#
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ETH port 1 Link / Activity Indication LED driven Low on Link (10, 100 or 1000Mbps) Blinks on Activity (active low)
2.10 CAN
The CAN interface of the Maury supports 2x CAN FD.
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Name
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Description
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CAN0_TX
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CAN 0 transmit data
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CAN0_RX
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CAN 0 receive data
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CAN1_TX
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CAN 1 transmit data
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CAN1_RX
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CAN 1 receive data
2.11 Display
2.11.1 LVDS-display
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Name
...
Description
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LVDS0_TX0_P
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LVDS port differential pair 0 positive signal
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LVDS0_TX0_N
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LVDS port differential pair 0 negative signal
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LVDS0_TX1_P
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LVDS port differential pair 1 positive signal
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LVDS0_TX1_N
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LVDS port differential pair 1 negative signal
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LVDS0_TX2_P
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LVDS port differential pair 2 positive signal
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LVDS0_TX2_N
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LVDS port differential pair 2 negative signal
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LVDS0_TX3_P
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LVDS port differential pair 3 positive signal
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LVDS0_TX3_N
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LVDS port differential pair 3 negative signal
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LVDS0_CK_P
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LVDS port differential clock pair positive signal
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LVDS0_CK_N
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LVDS port differential clock pair negative signal
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LCD0_BKLT_EN
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Backlight enable signal
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LCD0_BKLT_PWM
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Backlight PWM signal
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LCD0_VDD_EN
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Power control signal
2.11.2 MIPI or eDP (optional)
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Name
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Description
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EDP_DSI_D0_P
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MIPI port differential pair 0 positive signal
EDP port differential pair 0 positive signal (optional)
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EDP_DSI_D0_N
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MIPI port differential pair 0 negative signal
EDP port differential pair 0 negative signal (optional)
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EDP_DSI_D1_P
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MIPI port differential pair 1 positive signal
EDP port differential pair 1 positive signal (optional)
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EDP_DSI_D1_N
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MIPI port differential pair 1 negative signal
EDP port differential pair 1 negative signal (optional)
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EDP_DSI_D2_P
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MIPI port differential pair 2 positive signal
EDP port differential pair 2 positive signal (optional)
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EDP_DSI_D2_N
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MIPI port differential pair 2 negative signal
EDP port differential pair 2 negative signal (optional)
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EDP_DSI_D3_P
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MIPI port differential pair 3 positive signal
EDP port differential pair 3 positive signal (optional)
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EDP_DSI_D3_N
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MIPI port differential pair 3 negative signal
EDP port differential pair 3 negative signal (optional)
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EDP_DSI_CLK_P
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MIPI port differential clock pair positive signal
EDP port differential clock pair positive signal (optional)
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EDP_DSI_CLK_N
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MIPI port differential clock pair negative signal
EDP port differential clock pair negative signal (optional)
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LCD1_BKLT_EN
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Backlight enable signal
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LCD1_BKLT_PWM
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Backlight PWM signal
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LCD1_VDD_EN
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Power control signal
2.12 Camera
The i.MX 93 processor got a MIPI CSI camera interface. It is connected to the SMARC connector.
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Name
...
Description
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CSIO_CK_P
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CSI port differential clock pair positive signal
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CSIO_CK_N
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CSI port differential clock pair negative signal
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CSIO_RX0_P
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CSI port differential pair 0 positive signal
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CSIO_RX0_N
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CSI port differential pair 0 negative signal
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CSIO_RX1_P
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CSI port differential pair 1 positive signal
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CSIO_RX1_N
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CSI port differential pair 1 negative signal
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GPIO0/CAM0_PWR#
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Camera 0 power enable signal (active low)
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GPIO1/CAM1_PWR#
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Camera 1 power enable signal (active low)
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GPIO2/CAM0_RST#
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Camera 0 reset signal (active low)
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GPIO3/CAM1_RST#
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Camera 1 reset signal (active low)
Speed:
Features
2.13 Wireless
The Maury may be equipped with a AzureWave CM276NF WiFi and BT module. The antennas are connected directly to the module.
3. Specifications
3.1 Absolute Maximum Ratings
Absolute maximum ratings reflect conditions that the module may be exposed outside of the operating limits, without experiencing immediate functional failure. Functional operation is only expected during the conditions indicated under “Recommended Operating Conditions”. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the module. Exposure to absolute -maximum rated conditions for extended periods may affect device reliability.
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Pin
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Min
...
Max
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Unit
...
Supply Voltage
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5V_SLEEP
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-0.3
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5.5
...
V
...
VDD_RTC
...
-0.3
...
3.5
...
V
...
Storage Temperature
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TStorage
...
-40
...
+85
...
°C
3.2 Recommended Operating Conditions
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Pin
...
Min
...
Typ
...
Max
...
Unit
...
Supply Voltage
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5V_SLEEP
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4.75
...
5.0
...
5.25
...
V
...
VDD_RTC
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2.0
...
3.0
...
3.25
...
V
...
Supply current (typ.)
Power consumption dramatically depends on the usage scenario. This includes things like if the processors operqaating point (ffrequency) can be set to a lower level; if the GPU can be used by an application; the selected display resolution
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Operating temperature
The chip temperature of processor or LPDDR4 might get hotter. The max. case temperature of 1.MX 93 is specified with xxx (consumer) and xxx (industrial).
A higher refresh-rate-setting is needed when case temperature of LPDDR4 is expected to rise above xxx .
Temperature of eMMC influence the achievable Data Retention
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3.3 ESD Ratings (tbd)
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Max
...
Unit
...
V(ESD)
Electrostatic discharge
...
Human body model (HBM)
Charged-device model (CDM)
...
+/-1000
+/-250
...
V
V
3.4 Electrical characteristics
3.4.1 i.MX 93 GPIO DC parameters. Please view i.MX 93 tasheet for details:
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Parameter
...
Min
...
Max
...
Unit
...
VIL_1V8
...
Low-level input voltage
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-0.3
...
0.3 x VDD
...
V
...
VIH_1V8
...
High-level input voltage
...
0.7 x VDD
...
VDD + 0.3
...
V
...
VOL_1V8
...
High-level output voltage
...
0
...
0.2 x VDD
...
V
...
VOH_1V8
...
Low-level output voltage
...
0.8 x VDD
...
VDD
...
V
...
RP_up
...
Pull-Up Resistance
...
12 (typ 22)
...
49
...
kOhm
...
RP_down
...
Pull-Down Resistance
...
13 (typ 23)
...
48
...
kOhm
3.4.2 STM32 Cortex M0 GPIO DC parameters. Please view i.MX 93 tasheet for details:
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Parameter
...
Min
...
Max
...
Unit
...
VIL_1V8
...
Low-level input voltage
...
-
...
0.3 x VDDIO
...
V
...
VIH_1V8
...
High-level input voltage
...
0.7 x x VDDIO
...
-
...
V
...
VOL_1V8
...
High-level output voltage
...
-
...
0.4
...
V
...
VOH_1V8
...
Low-level output voltage
...
VDDIO - 0.45
...
-
...
V
...
RP_up
...
Pull-Up Resistance
...
25 (typ 40)
...
55
...
kOhm
...
RP_down
...
Pull-Down Resistance
...
25 (typ 40)
...
55
...
kOhm
3.5 Mechanical Specification
Dimensions (mm) of the Maury module (top view)
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At the following Links you will find documentation like Manual and Rev. specific documents.
Operatingsystems
Supported Software SOM-SMARC-i.MX93