Block Diagram

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Simplified Block diagram of MAURY

Features and Interfaces

Features

Processor:

NXP i.MX 93 ARM^® Dual Cortex-A55 @ 1.7GHz (consumer), 1.5GHz (industrial)

NXP i.MX 93 ARM^® Cortex-M33 @ 250MHz

NXP i.MX 93 ARM^® Ethos^TM U-65 microNPU

Memory:

Up to 2GByte of 16-bit LPDDR4-4000

Storage:

Up to 64 GByte eMMC

Wireless:

WLAN 802.11 a/b/g/n/ac

BT 5.3

MicroRF-antenna connector

Power:

PMIC to generate all internal and external voltages from 3.3V up to 5V supply.

Dimensions:

(Length x Width x Height): 82.0 x 50.0 x 5.4 mm

Interfaces / Signals accessible over connector:

• Power Supply through 5.0VDC +- 5%, +3.2V_RTC

• LVDS single channel up to 720p60

• MIPI_DSI or eDP interface (factory alternatives) up to 1080p60

• SD 4-bit interface (boot device)

• 2x Gigabit Ethernet interfaces

• 1x USB 2.0 OTG port

• up to 4x USB 2.0 using optional internal 2.0 Hub

• 1x I2S port

• 2x UART (4-wires)

• 2x UART (2-wires)

• 2x CAN interfaces

• 12x GPIOs

• 1x MIPI_CSI 2 Lanes Camera interface

• 1x General Purpose I2C Bus

• 2x PWM ports

• TPM

1 Pin-description

The main connector of the MAURY is the J1600 SMARC connector.

J400 may be used for debugging, programming and testing.

On the top side are UFL antenna connectors for the on-board WLAN + BT chip.

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Figure: Connectors

1.1 Pin Description

The following signals are present at the SMARC connector.

Table 1: J1600: SMARC connector