SOM-SMARC-MX93

Owned by Sven Hillger
Last updated: 06. Jun 2024 by Michael Schieren
12 min read

(This page is currently under construction and the following informations are preliminary)

Generals

image-20240216-143606.png

Description

The MAURY is powered by NXP i.MX 93 processor, which is designed to meet the latest market requirements of connected streaming audio/video devices, scanning/imaging devices and various devices demanding high-performance and low-power.

The i.MX 93 family of processors features advanced implementation of a dual ARM® Cortex®-A55 core, which operates at speeds of up to 1.7GHz (consumer version) and 1.5GHz (industrial version) integrated with a NPU that accelerates machine learning inference. A general purpose Cortex®-M33 core processor is for real-time and low-power processing. A 32-bit LPDDR4 is used for memory. There are a number of other i.MX 93 interfaces for connecting peripherals, such as displays, cameras, GPS and sensors, which are extended by components already available on the module:

  • eMMC (up to 64 GByte)

  • 2x 1Gbit Ethernet

  • TPM

  • USB 2.0 Hub (4x)

  • eDP

  • RTC

  • EEPROM

  • WLAN 802.11 a/b/g/n/ac and BT 5.3 Combo module (M.2 1216)

SMARC Standard

The SMARC (“Smart Mobility ARChitecture”) is a versatile small form factor computer Module definition targeting applications that require low power, low costs, and high performance. The Modules will typically use ARM SOCs similar or the same as those used in many familiar devices such as tablet computers and smart phones. Alternative low power SOCs and CPUs, such as tablet oriented x86 devices and other RISC CPUs may be used as well.
The Module power envelope is typically under 6W although designs up to about 15W are possible.

Block Diagram

Simplified Block diagram of MAURY

Features and Interfaces

Features

Processor:

NXP i.MX 93 ARM® Dual Cortex-A55 @ 1.7GHz (consumer), 1.5GHz (industrial)

NXP i.MX 93 ARM® Cortex-M33 @ 250MHz

NXP i.MX 93 ARM® EthosTM U-65 microNPU

Memory:

Up to 2GByte of 16-bit LPDDR4-4000

Storage:

Up to 64 GByte eMMC

Wireless:

WLAN 802.11 a/b/g/n/ac

BT 5.3

MicroRF-antenna connector

Power:

PMIC to generate all internal and external voltages from 3.3V up to 5V supply.

Dimensions:

(Length x Width x Height): 82.0 x 50.0 x 5.4 mm

Interfaces / Signals accessible over connector:

  • Power Supply through 5.0VDC +- 5%, +3.2V_RTC

  • LVDS single channel up to 720p60

  • MIPI_DSI or eDP interface (factory alternatives) up to 1080p60

  • SD 4-bit interface (boot device)

  • 2x Gigabit Ethernet interfaces

  • 1x USB 2.0 OTG port

  • up to 4x USB 2.0 using optional internal 2.0 Hub

  • 1x I2S port

  • 2x UART (4-wires)

  • 2x UART (2-wires)

  • 2x CAN interfaces

  • 12x GPIOs

  • 1x MIPI_CSI 2 Lanes Camera interface

  • 1x General Purpose I2C Bus

  • 2x PWM ports

  • TPM

Technical Documents

1 Pin-description

The main connector of the MAURY is the J1600 SMARC connector.

J400 may be used for debugging, programming and testing.

On the top side are UFL antenna connectors for the on-board WLAN + BT chip.

Figure: Connectors

 

1.1 Pin Description

The following signals are present at the SMARC connector.

Table 1: J1600: SMARC connector

Signal

Pin

 

Pin

Signal

Signal

Pin

 

Pin

Signal

 

 

 

S1

-

SMB_ALERT#

P1

 

S2

-

GND

P2

 

S3

GND

-

P3

 

S4

-

-

P4

 

S5

I2C1_SCL

-

P5

 

S6

-

-

P6

 

S7

I2C1_SDA

-

P7

 

S8

CSI0_CK_P

-

P8

 

S9

CSI0_CK_N

GND

P9

 

S10

GND

-

P10

 

S11

CSI0_RX0_P

-

P11

 

S12

CSI0_RX0_N

GND

P12

 

S13

GND

-

P13

 

S14

CSI0_RX1_P

-

P14

 

S15

CSI0_RX1_N

GND

P15

 

S16

GND

-

P16

 

S17

GBE1_MDIO_P

-

P17

 

S18

GBE1_MDIO_N

GND

P18

 

S19

GBE1_LINK100#

GBEO_MDI3_N

P19

 

S20

GBE1_MDI1_P

GBEO_MDI3_P

P20

 

S21

GBE1_MDI1_N

GBEO_LINK100#

P21

 

S22

GBE1_LINK1000#

GBEO_LINK1000#

P22

 

S23

GBE1_MDI2_P

GBEO_MDI2_N

P23

 

S24

GBE1_MDI2_N

GBEO_MDI2_P

P24

 

S25

GND

GBEO_LINK_ACT#

P25

 

S26

GBE1_MDI3_P

GBEO_MDI1_N

P26

 

S27

GBE1_MDI3_N

GBEO_MDI1_P

P27

 

S28

-

-

P28

 

S29

-

GBEO_MDI0_N

P29

 

S30

-

GBEO_MDI0_P

P30

 

S31

GBE1_LINK_ACT#

-

P31

 

S32

-

GND

P32

 

S33

-

-

P33

 

S34

GND

SDIO_CMD

P34

 

S35

USB4_DP

SDIO_CD#

P35

 

S36

USB4_DN

SDIO_CK

P36

 

S37

-

SDIO_PWR_EN_3V3

P37

 

S38

-

GND

P38

 

S39

I2S0_LRCK

SDIO_D0

P39

 

S40

I2S0_SDOUT

SDIO_D1

P40

 

S41

I2S0_SDIN

SDIO_D2

P41

 

S42

I2S0_CK

SDIO_D3

P42

 

S43

-

SPIO_CS0#

P43

 

S44

-

SPIO_CK

P44

 

S45

-

SPIO_DIN

P45

 

S46

-

SPIO_DO

P46

 

S47

GND

GND

P47

 

S48

I2C3_SCL

-

P48

 

S49

I2C3_SDA

-

P49

 

S50

I2S2_LRCK

GND

P50

 

S51

I2S2_SDOUT

-

P51

 

S52

I2S2_SDIN

-

P52

 

S53

I2S2_CK

GND

P53

 

S54

-

-

P54

 

S55

-

-

P55

 

S56

-

-

P56

 

S57

-

-

P57

 

S58

-

-

P58

 

S59

-

GND

P59

 

S60

-

USB0_DP

P60

 

S61

GND

USB0_DN

P61

 

S62

-

USB0_EN_OC#

P62

 

S63

-

USB0_VBUS_DET

P63

 

S64

GND

USB0_OTG_ID

P64

 

S65

-

USB1_EXT_DP

P65

 

S66

-

USB1_EXT_DN

P66

 

S67

GND

USB1_EN_OC#

P67

 

S68

USB3_DP

GND

P68

 

S69

USB3_DN

USB2_DP

P69

 

S70

GND

USB2_DN

P70

 

S71

-

USB2_EN_OC#

P71

 

S72

-

STM32_RST#

P72

 

S73

GND

-

P73

 

S74

-

USB3_EN_OC#

P74

 

S75

-

 

 

 

 

 

-

P75

 

S76

-

USB4_EN_OC#

P76

 

S77

-

PCIE_B_CKREQ#

P77

 

S78

-

PCIE_A_CKREQ#

P78

 

S79

-

GND

P79

 

S80

GND

-

P80

 

S81

-

-

P81

 

S82

-

GND

P82

 

S83

GND

-

P83

 

S84

-

-

P84

 

S85

-

GND

P85

 

S86

GND

-

P86

 

S87

-

-

P87

 

S88

-

GND

P88

 

S89

GND

-

P89

 

S90

-

-

P90

 

S91

-

GND

P91

 

S92

GND

-

P92

 

S93

-

-

P93

 

S94

-

GND

P94

 

S95

DP0_AUX_SEL

-

P95

 

S96

-

-

P96

 

S97

-

GND

P97

 

S98

DP0_HPD

-

P98

 

S99

-

-

P99

 

S100

-

GND

P100

 

S101

GND

-

P101

 

S102

-

-

P102

 

S103

-

GND

P103

 

S104

-

HDMI_HPD

P104

 

S105

DP0_AUX+

HDMI_CTRL_CK

P105

 

S106

DP0_AUX-

HDMI_CTRL_DAT

P106

 

S107

LCD1_BKLT_EN

DP1_AUX_SEL

P107

 

S108

EDP_DSI_CLK_P

GPIO0/CAM0_PWR#

P108

 

S109

EDP_DSI_CLK_N

GPIO1/CAM1_PWR#

P109

 

S110

GND

GPIO2/CAM0_RST#

P110

 

S111

EDP_DSI_D0_P

GPIO3/CAM1_RST#

P111

 

S112

EDP_DSI_D0_N

GPIO4

P112

 

S113

EDP1_HPD

GPIO5

P113

 

S114

EDP_DSI_D1_P

GPIO6

P114

 

S115

EDP_DSI_D1_N

GPIO7

P115

 

S116

LCD1_VDD_EN

GPIO8

P116

 

S117

EDP_DSI_D2_P

GPIO9

P117

 

S118

EDP_DSI_D2_N

GPIO10

P118

 

S119

GND

GPIO11

P119

 

S120

EDP_DSI_D3_P

GND

P120

 

S121

EDP_DSI_D3_N

I2C_PM_CK

P121

 

S122

LCD1_BKLT_PWM

I2C_PM_DAT

P122

 

S123

-

BOOT_SEL0#

P123

 

S124

GND

BOOT_SEL1#

P124

 

S125

LVDS0_TX0_P

BOOT_SEL2#

P125

 

S126

LVDS0_TX0_N

RESET_OUT#

P126

 

S127

LCD0_BKLT_EN

RESET_IN#

P127

 

S128

LVDS0_TX1_P

POWER_BTN#

P128

 

S129

LVDS0_TX1_N

SER0_TX

P129

 

S130

GND

SER0_RX

P130

 

S131

LVDS0_TX2_P

SER0_RTS#

P131

 

S132

LVDS0_TX2_N

SER0_CTS#

P132

 

S133

LCD0_VDD_EN

GND

P133

 

S134

LVDS0_CK_P

SER1_TX

P134

 

S135

LVDS0_CK_N

SER1_RX

P135

 

S136

GND

SER2_TX

P136

 

S137

LVDS0_TX3_P

SER2_RX

P137

 

S138

LVDS0_TX3_N

SER2_RTS#

P138

 

S139

I2C1_SCL

SER2_CTS#

P139

 

S140

I2C1_SDA

SER3_TX

P140

 

S141

LCD0_BKLT_PWM

SER3_RX

P141

 

S142

-

GND

P142

 

S143

GND

CAN0_TX

P143

 

S144

EDP0_HPD

CAN0_RX

P144

 

S145

WDT_TIME_OUT#

CAN1_TX

P145

 

S146

-

CAN1_RX

P146

 

S147

VDD_RTC

5V_SLEEP

P147

 

S148

LID#

5V_SLEEP

P148

 

S149

SLEEP#

5V_SLEEP

P149

 

S150

VIN_PWR_BAD#

5V_SLEEP

P150

 

S151

CHARGING#

5V_SLEEP

P151

 

S152

CHARGER_PRSNT#

5V_SLEEP

P152

 

S153

CARRIER_STBY#

5V_SLEEP

P153

 

S154

CARRIER_PWR_ON

5V_SLEEP

P154

 

S155

FORCE_RECOV#

5V_SLEEP

P155

 

S156

BATLOW#

5V_SLEEP

P156

 

S157

TEST#

 

 

 

S158

GND

J1600: SMARC connector:

Table 2: J400: i.MX 93 JTAG connector:

This flex-cable connector uses the Seco JTAG connector standard.

Pin

Signal

Pin

Signal

1

1V8_RUN_PTC

2

JTAG_TCK

3

JTAG_TMS

4

JTAG_TDI

5

JTAG_TDO

6

-

7

GND

 

1.2 Electrical pin information

PI:

Power Input

 

DO:

Digital Output

PO:

Power Output

 

DIO:

Digital Input/Output

 

 

 

DDI:

Differential Input

AI:

Analog Input

 

DDO:

Differential Output

AO:

Analog Output

 

DDIO:

Differential Input/Output

 

 

 

 

 

DI:

Digital Input

 

OD

Open-Drain Output

 

 

 

 

 

PD:

Pull-Down

(PDp: Pull-Down, Pull-behavior can be changed by software)

 

 

PU:

Pull-Up

PUp: Pull-Up, Pull-behavior can be changed by software

 

 

If two “types” are specified, the first value determines the type of primary function.

Table 3: SMARC pin information

Pin

Name

Type

Voltage

Connected to

Pin

Name

Type

Voltage

Connected to

P1

SMB_ALERT#

DI, PU(10K)

1V8

STM32, pin M2, port PA5

P2

GND

Ground

P3

-

 

 

 

P4

-

 

 

 

P5

-

 

 

 

P6

-

 

 

 

P7

-

 

 

 

P8

-

 

 

 

P9

GND

Ground

P10

-

 

 

 

P11

-

 

 

 

P12

GND

Ground

P13

-

 

 

 

P14

-

 

 

 

P15

GND

Ground

P16

-

 

 

 

P17

-

 

 

 

P18

GND

Ground

P19

GBEO_MDI3_N

DDIO

3V3

Gbit Ethernet-Phy

P20

GBEO_MDI3_P

DDIO

3V3

Gbit Ethernet-Phy

P21

GBEO_LINK100#

DO, PU(10K)

3V3

Gbit Ethernet-Phy

P22

GBEO_LINK1000#

DO, PU(4K7)

3V3

Gbit Ethernet-Phy

P23

GBEO_MDI2_N

DDIO

3V3

Gbit Ethernet-Phy

P24

GBEO_MDI2_P

DDIO

3V3

Gbit Ethernet-Phy

P25

GBEO_LINK_ACT#

DO, PU(10K)

3V3

Gbit Ethernet-Phy

P26

GBEO_MDI1_N

DDIO

3V3

Gbit Ethernet-Phy

P27

GBEO_MDI1_P

DDIO

3V3

Gbit Ethernet-Phy

P28

-

 

 

 

P29

GBEO_MDI0_N

DDIO

3V3

Gbit Ethernet-Phy

P30

GBEO_MDI0_P

DDIO

3V3

Gbit Ethernet-Phy

P31

-

 

 

 

P32

GND

Ground

P33

-

 

 

 

P34

SDIO_CMD

DO; PU(10K)

1V8 or 3V3

i.MX 93

P35

SDIO_CD#

DI, PU(10K)

1V8 or 3V3

i.MX 93

P36

SDIO_CK

DO, PU(10K)

1V8 or 3V3

i.MX 93

P37

SDIO_PWR_EN_3V3

DO, PU(2K2)

1V8 or 3V3

i.MX 93

P38

GND

Ground

P39

SDIO_D0

DIO

1V8 or 3V3

i.MX 93

P40

SDIO_D1

DIO

1V8 or 3V3

i.MX 93

P41

SDIO_D2

DIO

1V8 or 3V3

i.MX 93

P42

SDIO_D3

DIO

1V8 or 3V3

i.MX 93

P43

SPIO_CS0#

DO

1V8

i.MX 93

P44

SPIO_CK

DO

1V8

i.MX 93

P45

SPIO_DIN

DI

1V8

i.MX 93

P46

SPIO_DO

DO

1V8

i.MX 93

P47

GND

Ground

P48

-

 

 

 

P49

-

 

 

 

P50

GND

Ground

P51

-

 

 

 

P52

-

 

 

 

P53

GND

Ground

P54

-

 

 

 

P55

-

 

 

 

P56

-

 

 

 

P57

-

 

 

 

P58

-

 

 

 

P59

GND

Ground

P60

USB0_DP

DDIO

3V3

i.MX 93

P61

USB0_DN

DDIO

3V3

i.MX 93

P62

USB0_EN_OC#

DI,DO,PU(10K)

1V8

STM32, pin K1, port PC0

P63

USB0_VBUS_DET

DI, PD(10K)

3V3

i.MX 93

P64

USB0_OTG_ID

DI

3V3

i.MX 93

P65

USB1_EXT_DP

DDIO

3V3

USB Hub or
i.MX 93 (if no USB Hub)

P66

USB1_EXT_DN

DDIO

3V3

USB Hub or
i.MX 93 (if no USB Hub)

P67

USB1_EN_OC#

DI,DO,PU(10K)

1V8

STM32, pin K2, port PC2

P68

GND

Ground

P69

USB2_DP

DDIO

3V3

USB Hub (optional)

P70

USB2_DN

DDIO

3V3

USB Hub (optional)

P71

USB2_EN_OC#

DI,DO,PU(10K)

1V8

STM32, pin L1, port PC3

P72

STM32_RST#

DI, PU(10K)

1V8

STM32, pin G2

P73

-

 

 

 

P74

USB3_EN_OC#

DI,DO,PU(10K)

1V8

STM32, pin M1, port PA2

P75

-

 

 

 

P76

USB4_EN_OC#

DI,DO,PU(10K)

1V8

STM32, pin M3, port PA6

P77

PCIE_B_CKREQ#

DI, DO

1V8

STM32, pin C11, port PA13
used as SWDIO

P78

PCIE_A_CKREQ#

DI

1V8

STM32, pin B12
used as SWCLK

P79

GND

Ground

P80

-

 

 

 

P81

-

 

 

 

P82

GND

Ground

P83

-

 

 

 

P84

-

 

 

 

P85

GND

Ground

P86

-

 

 

 

P87

-

 

 

 

P88

GND

Ground

P89

-

 

 

 

P90

-

 

 

 

P91

GND

Ground

P92

-

 

 

 

P93

-

 

 

 

P94

GND

Ground

P95

-

 

 

 

P96

-

 

 

 

P97

GND

Ground

P98

-

 

 

 

P99

-

 

 

 

P100

GND

Ground

P101

-

 

 

 

P102

-

 

 

 

P103

GND

Ground

P104

HDMI_HPD

PD (1M)

 

not connected

P105

HDMI_CTRL_CK

PD (100K)

 

not connected

P106

HDMI_CTRL_DAT

PD (100K)

 

not connected

P107

DP1_AUX_SEL

PD (1M)

 

not connected

P108

GPIO0/CAM0_PWR#

DIO

1V8

STM32, Pin H3, Port PF3

P109

GPIO1/CAM1_PWR#

DIO

1V8

STM32, Pin H2, Port PF4

P110

GPIO2/CAM0_RST#

DIO

1V8

STM32, Pin J2, Port PF5

P111

GPIO3/CAM1_RST#

DIO

1V8

STM32, Pin M6, Port PF6

P112

GPIO4

DIO

1V8

STM32, Pin M8, Port PE8

P113

GPIO5

DIO

1V8

STM32, Pin K8, Port PE9

P114

GPIO6

DIO

1V8

STM32, Pin L8, Port PE10

P115

GPIO7

DIO

1V8

STM32, Pin M9, Port PE11

P116

GPIO8

DIO

1V8

STM32, Pin L9, Port PE12

P117

GPIO9

DIO

1V8

STM32, Pin M10, Port PE13

P118

GPIO10

DIO

1V8

STM32, Pin K9, Port PE14

P119

GPIO11

DIO

1V8

STM32, Pin L10, Port PE15

P120

GND

Ground

P121

I2C_PM_CK

DO, PU(4K7)

1V8

STM32, Pin C4, Port PB6

P122

I2C_PM_DAT

DIO, PU(4K7)

1V8

STM32, Pin B3 Port PB7

P123

BOOT_SEL0#

DI, PU(10K)

1V8

STM32, Pin K11, Port PB14

P124

BOOT_SEL1#

DI, PU(10K)

1V8

STM32, Pin G11, Port PD11

P125

BOOT_SEL2#

DI, PU(10K)

1V8

STM32, Pin L11, Port PB11

P126

RESET_OUT#

DO

1V8

STM32, Pin K3, Port PA0

P127

RESET_IN#

DI, PU(10K)

1V8

STM32, Pin E10, Port PA10

P128

POWER_BTN#

DI, PU(10K)

1V8

STM32, Pin M12, Port PB13

P129

SER0_TX

DO

1V8

i.MX 93

P130

SER0_RX

DI, PU(100K)

1V8

i.MX 93

P131

SER0_RTS#

DO

1V8

i.MX 93

P132

SER0_CTS#

DI, PU(100K)

1V8

i.MX 93

P133

GND

Ground

P134

SER1_TX

DO, PU(4K7)

1V8

i.MX 93

P135

SER1_RX

DI, PU(100K)

1V8

i.MX 93

P136

SER2_TX

DO

1V8

i.MX 93

P137

SER2_RX

DI, PU(100K)

1V8

i.MX 93

P138

SER2_RTS#

DO

1V8

i.MX 93

P139

SER2_CTS#

DI, PU(100K)

1V8

i.MX 93

P140

SER3_TX

DO, PU(10K)

1V8

i.MX 93

P141

SER3_RX

DI, PU(100K)

1V8

i.MX 93

P142

GND

Ground

P143

CAN0_TX

DO

1V8

i.MX 93

P144

CAN0_RX

DI

1V8

i.MX 93

P145

CAN1_TX

DO

1V8

i.MX 93

P146

CAN1_RX

DI

1V8

i.MX 93

P147

5V_SLEEP

PI

5V0

 

P148

5V_SLEEP

PI

5V0

 

P149

5V_SLEEP

PI

5V0

 

P150

5V_SLEEP

PI

5V0

 

P151

5V_SLEEP

PI

5V0

 

P152

5V_SLEEP

PI

5V0

 

P153

5V_SLEEP

PI

5V0

 

P154

5V_SLEEP

PI

5V0

 

P155

5V_SLEEP

PI

5V0

 

P156

5V_SLEEP

PI

5V0

 

S1

-

 

 

 

S2

-

 

 

 

S3

GND

Ground

S4

-

 

 

 

S5

I2C1_SCL

DO, PU(4K7)

1V8

i.MX 93

S6

-

 

 

 

S7

I2C1_SDA

DIO, PU(4K7)

1V8

i.MX 93

S8

CSI0_CK_P

DDI

1V8

i.MX 93

S9

CSI0_CK_N

DDI

1V8

i.MX 93

S10

GND

Ground

S11

CSI0_RX0_P

DDI

1V8

i.MX 93

S12

CSI0_RX0_N

DDI

1V8

i.MX 93

S13

GND

Ground

S14

CSI0_RX1_P

DDI

1V8

i.MX 93

S15

CSI0_RX1_N

DDI

1V8

i.MX 93

S16

GND

Ground

S17

GBE1_MDIO_P

DDIO

3V3

Gbit Ethernet-Phy

S18

GBE1_MDIO_N

DDIO

3V3

Gbit Ethernet-Phy

S19

GBE1_LINK100#

DO, PU(10K)

3V3

Gbit Ethernet-Phy

S20

GBE1_MDI1_P

DDIO

3V3

Gbit Ethernet-Phy

S21

GBE1_MDI1_N

DDIO

3V3

Gbit Ethernet-Phy

S22

GBE1_LINK1000#

DO, PU(4K7)

3V3

Gbit Ethernet-Phy

S23

GBE1_MDI2_P

DDIO

3V3

Gbit Ethernet-Phy

S24

GBE1_MDI2_N

DDIO

3V3

Gbit Ethernet-Phy

S25

GND

Ground

S26

GBE1_MDI3_P

DDIO

3V3

Gbit Ethernet-Phy

S27

GBE1_MDI3_N

DDIO

3V3

Gbit Ethernet-Phy

S28

-

 

 

 

S29

-

 

 

 

S30

-

 

 

 

S31

GBE1_LINK_ACT#

DO, PU(10K)

3V3

Gbit Ethernet-Phy

S32

-

 

 

 

S33

-

 

 

 

S34

GND

Ground

S35

USB4_DP

DDIO

3V3

USB Hub (optional)

S36

USB4_DN

DDIO

3V3

USB Hub (optional)

S37

-

 

 

 

S38

-

 

 

 

S39

I2S0_LRCK

DIO, PU(4K7)

1V8

i.MX 93

S40

I2S0_SDOUT

DO, PU(4K7)

1V8

i.MX 93

S41

I2S0_SDIN

DI

1V8

i.MX 93

S42

I2S0_CK

DO

1V8

i.MX 93

S43

-

 

 

 

S44

-

 

 

 

S45

-

 

 

 

S46

-

 

 

 

S47

GND

Ground

S48

I2C3_SCL

DO, PU(4K7)

1V8

i.MX 93

S49

I2C3_SDA

DIO, PU(4K7)

1V8

i.MX 93

S50

I2S2_LRCK

DIO

1V8

WiFi (optional)

S51

I2S2_SDOUT

DO

1V8

WiFi (optional)

S52

I2S2_SDIN

DI

1V8

WiFi (optional)

S53

I2S2_CK

DO

1V8

WiFi (optional)

S54

-

 

 

 

S55

-

 

 

 

S56

-

 

 

 

S57

-

 

 

 

S58

-

 

 

 

S59

-

 

 

 

S60

-

 

 

 

S61

GND

Ground

S62

-

 

 

 

S63

-

 

 

 

S64

GND

Ground

S65

-

 

 

 

S66

-

 

 

 

S67

GND

Ground

S68

USB3_DP

DDIO

3V3

USB Hub (optional)

S69

USB3_DN

DDIO

3V3

USB Hub (optional)

S70

GND

Ground

S71

-

 

 

 

S72

-

 

 

 

S73

GND

Ground

S74

-

 

 

 

S75

-

 

 

 

S76

-

 

 

 

S77

-

 

 

 

S78

-

 

 

 

S79

-

 

 

 

S80

GND

Ground

S81

-

 

 

 

S82

-

 

 

 

S83

GND

Ground

S84

-

 

 

 

S85

-

 

 

 

S86

GND

Ground

S87

-

 

 

 

S88

-

 

 

 

S89

GND

Ground

S90

-

 

 

 

S91

-

 

 

 

S92

GND

Ground

S93

-

 

 

 

S94

-

 

 

 

S95

DP0_AUX_SEL

PD(1M)

 

not connected

S96

-

 

 

 

S97

-

 

 

 

S98

DP0_HPD

PD(1M)

 

not connected

S99

-

 

 

 

S100

-

 

 

 

S101

GND

Ground

S102

-

 

 

 

S103

-

 

 

 

S104

-

 

 

 

S105

DP0_AUX+

PD(100K)

 

not connected

S106

DP0_AUX-

PU(100K)

 

not connected

S107

LCD1_BKLT_EN

DO

1V8

STM32, Pin M11, Port PB10

S108

EDP_DSI_CLK_P

DDIO

 

MIPI to eDP bridge

S109

EDP_DSI_CLK_N

DDIO

 

MIPI to eDP bridge

S110

GND

Ground

S111

EDP_DSI_D0_P

DDIO

 

MIPI to eDP bridge

S112

EDP_DSI_D0_N

DDIO

 

MIPI to eDP bridge

S113

EDP1_HPD

DI, PD(1M)

1V8

MIPI to eDP bridge

S114

EDP_DSI_D1_P

DDIO

 

MIPI to eDP bridge

S115

EDP_DSI_D1_N

DDIO

 

MIPI to eDP bridge

S116

LCD1_VDD_EN

DO

1V8

STM32, Pin M5, Port PB1

S117

EDP_DSI_D2_P

DDIO

 

MIPI to eDP bridge

S118

EDP_DSI_D2_N

DDIO

 

MIPI to eDP bridge

S119

GND

Ground

S120

EDP_DSI_D3_P

DDIO

 

MIPI to eDP bridge

S121

EDP_DSI_D3_N

DDIO

 

MIPI to eDP bridge

S122

LCD1_BKLT_PWM

DO

1V8

STM32, Pin L12, Port PA8

S123

-

 

 

 

S124

GND

Ground

S125

LVDS0_TX0_P

DDIO

 

i.MX 93

S126

LVDS0_TX0_N

DDIO

 

i.MX 93

S127

LCD0_BKLT_EN

DO

1V8

STM32, Pin C8, Port PD3

S128

LVDS0_TX1_P

DDIO

 

i.MX 93

S129

LVDS0_TX1_N

DDIO

 

i.MX 93

S130

GND

Ground

S131

LVDS0_TX2_P

DDIO

 

i.MX 93

S132

LVDS0_TX2_N

DDIO

 

i.MX 93

S133

LCD0_VDD_EN

DO

1V8

STM32, Pin B7, Port B7

S134

LVDS0_CK_P

DDIO

 

i.MX 93

S135

LVDS0_CK_N

DDIO

 

i.MX 93

S136

GND

Ground

S137

LVDS0_TX3_P

DDIO

 

i.MX 93

S138

LVDS0_TX3_N

DDIO

 

i.MX 93

S139

I2C1_SCL

DO, PU(4K7)

1V8

i.MX 93

S140

I2C1_SDA

DIO, PU(4K7)

1V8

i.MX 93

S141

LCD0_BKLT_PWM

DO

1V8

STM32, Pin K5, Port PA7

S142

-

 

 

 

S143

GND

Ground

S144

EDP0_HPD

PD(1M)

 

not connected

S145

WDT_TIME_OUT#

DO

1V8

STM32, Pin K12, Port PC7

S146

-

 

 

 

S147

VDD_RTC

PI

3V0

S148

LID#

DI, PU(10K)

1V8

STM32, Pin D12, PA11

S149

SLEEP#

DI, PU(10K)

1V8

STM32, Pin C12, PA12

S150

VIN_PWR_BAD#

DI

 

Power management

S151

CHARGING#

DI, PU(10K)

1V8

STM32, Pin D10, Port PF8

S152

CHARGER_PRSNT#

DI, PU(10K)

1V8

STM32, Pin H11, Port PD9

S153

CARRIER_STBY#

DO

1V8

STM32, Pin M4, Port PC5

S154

CARRIER_PWR_ON

DO

1V8

STM32, Pin L3, Port PA4

S155

FORCE_RECOV#

DI, PU(10K)

1V8

STM32, Pin H12, Port PD10

S156

BATLOW#

DI, PU(10K)

1V8

STM32, Pin B11, Port PA15

S157

TEST#

DI, PU(10K)

1V8

program mode STM32

S158

GND

Ground

 

2. Interfaces

This chapter includes a short description of all interfaces of the MAURY. Please consult the processor datasheet for detailed information.

2.1 Power Supply

The MAURY can be supplied by a single +5.0V power supply.

Table 4: Power Supply pins

Name

Description

Name

Description

5V_SLEEP

5V power input. This supply controls the STM32. STM32 MCU controls reset and power to the i.MX 93 processor.

GND

Ground input

VDD_RTC

3V power supply to supply the RTC on the MAURY

2.2 Control signals

Table 5: Control Signal pins

Name

Description

Name

Description

RESET_IN#

Negated reset input. 0: reset device, 1: normal operation

RESET_OUT#

Negated reset output. 0: device in reset, 1: normal operation (active low)

BOOT_SEL[2…0]

tell the module what physical device to do a BCT boot from (see table xxx below)

STM32_RST#

Negated reset input for STM32. 0: reset STM32, 1: normal operation (active low)

POWER_BTN#

Carrier based power button (active low)

WDT_TIME_OUT#

Watchdog output (active low)

LID#

Lid open/close indication input (active low)

SLEEP#

Sleep indicator input (active low)

VIN_PWR_BAD#

Power status input. 0: Carrierrboard power is not ready to support MAURY, 1: Carrierboard power is ready to support MAURY (active low)

CHARGING#

Input, held low by carrier during battery scharging, float when charging is complete (active low)

CHARGER_PRSNT#

Input, held low by Carrier if DC input for battery charger is present (active low)

CARRIER_STBY#

Power status output. If the power save state standby
mode is implemented at the Carrier the runtime voltage rails are enabled with this control signal from the module. The module drives this signal high to enable runtime power rails. If no separate standby mode is implemented all rails are enabled with CARRIER_PWR_ON signal. This signal is driven high by the module at runtime. (active low)

CARRIER_PWR_ON

Power status output. It is a signal to Carrier that the
Carrier specific power supplies that shall be powered during standby may be enabled. If standby power save state is implemented at the Carrier this signal enables the standby voltage rails.

FORCE_RECOV#

Primary boot media can be re-initialized (active low)

BATLOW#

Input, battery low indication to Module. Carrier to float the line in inactive state (active low)

TEST#

Negated test input of STM32. 0: device in programming mode, 1: normal operation (active low)

 

Table 6: Boot Selection configuration

 

BOOT_SEL2#

BOOT_SEL1#

BOOT_SEL0#

Boot Source

 

BOOT_SEL2#

BOOT_SEL1#

BOOT_SEL0#

Boot Source

0

GND

GND

GND

Carrier SATA

1

GND

GND

Float

Carrier SD Card

2

GND

Float

GND

Carrier eSPI

3

GND

Float

Float

Carrier SPI

4

Float

GND

GND

Module device (NAND, NOR)

5

Float

GND

Float

Remote boot (GBE, serial)

6

Float

Float

GND

Module eMMC Flash

7

Float

Float

Float

Module SPI

 

2.3 UART

The i.MX 93 provides 4 Universal Asynchronous Receiver/Transmitter. With a transceiver these signals can be converted to RS232, RS485 or IrDA.

Following UART ports are accessible through the SMARC connector:

Table 7: UART pins

Name

Description

Name

Description

SER0_TX

Serial 0 transmit output

SER0_RX

Serial 0 receive input

SER0_RTS#

Serial 0 request to send output (active low)

SER0_CTS#

Serial 0 clear to send input (active low)

SER1_TX

Serial 1 transmit output

SER1_RX

Serial 1 receive input

SER2_TX

Serial 2 transmit output

SER2_RX

Serial 2 receive input

SER2_RTS#

Serial 2 request to send output (active low)

SER2_CTS#

Serial 2 clear to send input (active low)

SER3_TX

Serial 3 transmit output

SER3_RX

Serial 3 receive input

Baudrate: High-speed TIA/EIA-232-F compatible, up to 1Mbit/s, IrDA-compatible, up to 115.2 Kbit/s

Data-Bits: 7 or 8 bits (RS232) or 9 bit (RS485)

Stop Bits: 1, 2

Parity: None, Even, Odd

Features: Hardware flow control (RTS, CTS)

 

2.4 SPI

The serial peripheral interface is a programmable synchronous serial port, which may be used to connect to a multiple of different peripherals.

Table 8: SPI pins

Name

Description

Name

Description

SPIO_CS0#

SPI 0 slave select

SPI0_CK

SPI 0 clock

SPI0_DIN

SPI 0 data in

SPI0_DO

SPI 0 data out

Speed: up to xxx MHz

 

2.5 I2C

The Inter-Integrated Circuit (I2C ) provides functionality of a standard I2C master and slave.

Table 9: I2C pins

Name

Description

Name

Description

I2C1_SCL

I2C1 clock

I2C1_SDA

I2C1 data

I2C3_SCL

I2C3 clock

I2C3_SDA

I2C3 data

I2C_PM_CK

I2C PM clock

I2C_PM_DAT

I2C PM data

Speed: Standard mode, up to 100kbit/s
Fast mode, up to 400 kbit/s

Features: Multimaster operation.
I2C Bus specification version 2.1

 

2.6 I2S

The Inter-IC sound interface provides a synchronous audio interface (SAI) and is used to connect to audio codecs.

Table 10: I2S pins

Name

Description

Name

Description

I2S0_LRCK

I2S0 Left & Right Synchronisation Clock

I2S0_SDOUT

I2S0 Digital Audio Output

I2S0_SDIN

I2S0 Digital Audio Input

I2S0_CK

I2S0 Digital Audio Clock

I2S2_LRCK

I2S2 Left & Right Synchronisation Clock

I2S2_SDOUT

I2S2 Digital Audio Output

I2S2_SDIN

I2S2 Digital Audio Input

I2S2_CK

I2S2 Digital Audio Clock

 

2.7 SD-Card

The SD-Card interface may be used to connect a SD-Card, eMMC or SDIO hardware.

Table 11: SDIO pins

Name

Description

Name

Description

SDIO_CMD

SDIO command output

SDIO_CD#

SDIO card detect input (active low)

SDIO_CK

SDIO clk output

SDIO_PWR_EN_3V3

SDIO Power enable signal

SDIO_D0

SDIO data bit 0

SDIO_D1

SDIO data bit 1

SDIO_D2

SDIO data bit 2

SDIO_D3

SDIO data bit 3

Speed: Card bus clock frequency up to 208 MHz

Features: Conforms to the SD Host Controller Standard Specification version 3.0.

Compatible with the MMC System Specification version 4.2/4.3/4.4/4.41/5.0.
Compatible with the SD Memory Card Specification version 3.0 and supports the Extended Capacity SD Memory Card
Compatible with the SDIO Card Specification version 3.0

 

2.8 USB

In the standard configuration, the MAURY offers two USB 2.0 ports, which are routed to the SMARC connector. As an assembly option, a quad USB hub is possible, so that up to five USB ports are possible on the SMARC connector.

Table 12: USB pins

Name

Description

Name

Description

USB0_DP

USB0 data (positive)

USB0_DN

USB0 data (negative)

USB0_EN_OC#

USB0 power enable output and overcurrent input (active low)

USB0_VBUS_DET

USB0 VBUS detection

USB0_OTG_ID

USB0 ID detect

USB1_EXT_DP

USB1 data (positive)

USB1_EXT_DN

USB1 data (negative)

USB1_EN_OC#

USB1 power enable output and overcurrent input (active low)

USB2_DP

USB2 data (positive) (optional)

USB2_DN

USB2 data (negative) (optional)

USB2_EN_OC#

USB2 power enable output and overcurrent input (active low) (optional)

USB3_DP

USB3 data (positive) (optional)

USB3_DN

USB3 data (negative) (optional)

USB3_EN_OC#

USB3 power enable output and overcurrent input (active low) (optional)

USB4_DP

USB4 data (positive) (optional)

USB4_DN

USB4 data (negative) (optional)

USB4_EN_OC#

USB4 power enable output and overcurrent input (active low) (optional)

Speed: High-speed 480Mbit/s
Full-speed 12Mbit/s
Low-speed 1.5Mbit/s
Features: Complies with USB specification rev. 2.0

 

2.9 Ethernet

The MAURY uses two Realtek RTL8211 integrated 10/100/1000 Mbps Ethernet Transceiver to interface with the i.MX 93 RGMII.

Table 13: Ethernet pins

Name

Description

Name

Description

GBE0_MDI0_P

ETH port 0 differential pair 0 positive signal

GBE0_MDI0_N

ETH port 0 differential pair 0 negative signal

GBE0_MDI1_P

ETH port 0 differential pair 1 positive signal

GBE0_MDI1_N

ETH port 0 differential pair 1 negative signal

GBE0_MDI2_P

ETH port 0 differential pair 2 positive signal

GBE0_MDI2_N

ETH port 0 differential pair 2 negative signal

GBE0_MDI3_P

ETH port 0 differential pair 3 positive signal

GBE0_MDI3_N

ETH port 0 differential pair 3 negative signal

GBE0_LINK100#

ETH port 0 Link Speed indication LED for GBE0 100Mbps (active low)

GBE0_LINK1000#

ETH port 0 Link Speed indication LED for GBE0 1000Mbps (active low)

GBE0_LINK_ACT#

ETH port 0 Link / Activity Indication LED driven Low on Link (10, 100 or 1000Mbps) Blinks on Activity (active low)

GBE1_MDI0_P

ETH port 1 differential pair 0 positive signal

GBE1_MDI0_N

ETH port 1 differential pair 0 negative signal

GBE1_MDI1_P

ETH port 1 differential pair 1 positive signal

GBE1_MDI1_N

ETH port 1 differential pair 1 negative signal

GBE1_MDI2_P

ETH port 1 differential pair 2 positive signal

GBE1_MDI2_N

ETH port 1 differential pair 2 negative signal

GBE1_MDI3_P

ETH port 1 differential pair 3 positive signal

GBE1_MDI3_N

ETH port 1 differential pair 3 negative signal

GBE1_LINK100#

ETH port 1 Link Speed indication LED for GBE0 100Mbps (active low)

GBE1_LINK1000#

ETH port 1 Link Speed indication LED for GBE0 1000Mbps (active low)

GBE1_LINK_ACT#

ETH port 1 Link / Activity Indication LED driven Low on Link (10, 100 or 1000Mbps) Blinks on Activity (active low)

 

2.10 CAN

The CAN interface of the MAURY supports 2x CAN FD.

Table 14: CAN pins

Name

Description

Name

Description

CAN0_TX

CAN 0 transmit data

CAN0_RX

CAN 0 receive data

CAN1_TX

CAN 1 transmit data

CAN1_RX

CAN 1 receive data

 

2.11 Display

2.11.1 LVDS-display

Table 15: LVDS pins

Name

Description

Name

Description

LVDS0_TX0_P

LVDS port differential pair 0 positive signal

LVDS0_TX0_N

LVDS port differential pair 0 negative signal

LVDS0_TX1_P

LVDS port differential pair 1 positive signal

LVDS0_TX1_N

LVDS port differential pair 1 negative signal

LVDS0_TX2_P

LVDS port differential pair 2 positive signal

LVDS0_TX2_N

LVDS port differential pair 2 negative signal

LVDS0_TX3_P

LVDS port differential pair 3 positive signal

LVDS0_TX3_N

LVDS port differential pair 3 negative signal

LVDS0_CK_P

LVDS port differential clock pair positive signal

LVDS0_CK_N

LVDS port differential clock pair negative signal

LCD0_BKLT_EN

Backlight enable signal

LCD0_BKLT_PWM

Backlight PWM signal

LCD0_VDD_EN

Power control signal

2.11.2 MIPI or eDP (optional)

Table 16: MIPI or eDP pins

Name

Description

Name

Description

EDP_DSI_D0_P

MIPI port differential pair 0 positive signal
EDP port differential pair 0 positive signal (optional)

EDP_DSI_D0_N

MIPI port differential pair 0 negative signal
EDP port differential pair 0 negative signal (optional)

EDP_DSI_D1_P

MIPI port differential pair 1 positive signal
EDP port differential pair 1 positive signal (optional)

EDP_DSI_D1_N

MIPI port differential pair 1 negative signal
EDP port differential pair 1 negative signal (optional)

EDP_DSI_D2_P

MIPI port differential pair 2 positive signal
EDP port differential pair 2 positive signal (optional)

EDP_DSI_D2_N

MIPI port differential pair 2 negative signal
EDP port differential pair 2 negative signal (optional)

EDP_DSI_D3_P

MIPI port differential pair 3 positive signal
EDP port differential pair 3 positive signal (optional)

EDP_DSI_D3_N

MIPI port differential pair 3 negative signal
EDP port differential pair 3 negative signal (optional)

EDP_DSI_CLK_P

MIPI port differential clock pair positive signal
EDP port differential clock pair positive signal (optional)

EDP_DSI_CLK_N

MIPI port differential clock pair negative signal
EDP port differential clock pair negative signal (optional)

LCD1_BKLT_EN

Backlight enable signal

LCD1_BKLT_PWM

Backlight PWM signal

LCD1_VDD_EN

Power control signal

 

2.12 Camera

The i.MX 93 processor got a MIPI CSI camera interface. It is connected to the SMARC connector.

Table 17: Camera pins

Name

Description

Name

Description

CSIO_CK_P

CSI port differential clock pair positive signal

CSIO_CK_N

CSI port differential clock pair negative signal

CSIO_RX0_P

CSI port differential pair 0 positive signal

CSIO_RX0_N

CSI port differential pair 0 negative signal

CSIO_RX1_P

CSI port differential pair 1 positive signal

CSIO_RX1_N

CSI port differential pair 1 negative signal

GPIO0/CAM0_PWR#

Camera 0 power enable signal (active low)

GPIO1/CAM1_PWR#

Camera 1 power enable signal (active low)

GPIO2/CAM0_RST#

Camera 0 reset signal (active low)

GPIO3/CAM1_RST#

Camera 1 reset signal (active low)

Speed:

Features

 

2.13 Wireless

The MAURY may be equipped with a AzureWave CM276NF WiFi and BT module. The antennas are connected directly to the module.

 

2.14 NONE SMARC STANDARD

Beyond the SMARC Standard there is the possibility to acces alternative function and Interfaces of the i.MX93. The CPU’s “MUX Mode Select Field” can be used therefore.

2.14.1 MQS (Medium Quality Sound)

The MQS is an audio output which can be used to connect sound speaker or headphones without an additional DAC IC.

MQS1 is accessible over the SMARC Connector.

MQS1_LEFT : CAN0_TX (SMARC P143) or I2S0_LRCK (SMARC S39 )

MQS1_RIGHT: CAN0_RX (SMARC P144) or I2S0_SDIN (SMARC S41 )

 

MQS2 is accessible over the JTAG Connector J400.

MQS2_LEFT: JTAG_TDI (J400 Pin 4)

MQS2_RIGHT: JTAG_TDO (J400 Pin 5)

3. Specifications

3.1 Absolute Maximum Ratings

Absolute maximum ratings reflect conditions that the module may be exposed outside of the operating limits, without experiencing immediate functional failure. Functional operation is only expected during the conditions indicated under “Recommended Operating Conditions”. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the module. Exposure to absolute -maximum rated conditions for extended periods may affect device reliability.

 

Pin

Min

Max

Unit

 

Pin

Min

Max

Unit

Supply Voltage

5V_SLEEP

-0.3

5.5

V

 

VDD_RTC

-0.3

3.5

V

Storage Temperature

TStorage

-40

+85

°C

3.2 Recommended Operating Conditions

 

Pin

Min

Typ

Max

Unit

 

Pin

Min

Typ

Max

Unit

Supply Voltage

5V_SLEEP

4.75

5.0

5.25

V

 

VDD_RTC

2.0

3.0

3.25

V

Supply current (typ.)
Power consumption dramatically depends on the usage scenario. This includes things like if the processors operqaating point (ffrequency) can be set to a lower level; if the GPU can be used by an application; the selected display resolution

@ 5V_SLEEP

Idle

Using/Running

Typ. Peak currents when running








tbd

tbd

tbd

 



mA

mA

A

Operating temperature
The chip temperature of processor or LPDDR4 might get hotter. The max. case temperature of 1.MX 93 is specified with xxx (consumer) and xxx (industrial).
A higher refresh-rate-setting is needed when case temperature of LPDDR4 is expected to rise above xxx .
Temperature of eMMC influence the achievable Data Retention

TConsumer

TExtended

TIndustrial

0

-25

-40

+25

+25

+25

+85

+85

+85

°C

°C

°C

 

3.3 ESD Ratings (tbd)

 

 

Max

Unit

 

 

Max

Unit

V(ESD)
Electrostatic discharge

Human body model (HBM)

Charged-device model (CDM)

+/-1000

+/-250

V

V

 

3.4 Electrical characteristics

3.4.1 i.MX 93 GPIO DC parameters. Please view i.MX 93 datasheet for details:

 

Parameter

Min

Max

Unit

 

Parameter

Min

Max

Unit

VIL_1V8

Low-level input voltage

-0.3

0.3 x VDD

V

VIH_1V8

High-level input voltage

0.7 x VDD

VDD + 0.3

V

VOL_1V8

High-level output voltage

0

0.2 x VDD

V

VOH_1V8

Low-level output voltage

0.8 x VDD

VDD

V

RP_up

Pull-Up Resistance

12 (typ 22)

49

kOhm

RP_down

Pull-Down Resistance

13 (typ 23)

48

kOhm

 

 

3.4.2 STM32 Cortex M0 GPIO DC parameters. Please view STM32 datasheet for details:

 

Parameter

Min

Max

Unit

 

Parameter

Min

Max

Unit

VIL_1V8

Low-level input voltage

-

0.3 x VDDIO

V

VIH_1V8

High-level input voltage

0.7 x x VDDIO

-

V

VOL_1V8

High-level output voltage

-

0.4

V

VOH_1V8

Low-level output voltage

VDDIO - 0.45

-

V

RP_up

Pull-Up Resistance

25 (typ 40)

55

kOhm

RP_down

Pull-Down Resistance

25 (typ 40)

55

kOhm

 

3.5 Mechanical Specification

Dimensions (mm) of the MAURY module (top view)