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Description

The Trizeps VIII Mini is powered by NXP i.MX 8M Mini processor, which is designed to meet the latest market requirements of connected streaming audio/video devices, scanning/imaging devices and various devices demanding high-performance and low-power.

The i.MX 8M Mini family of processors features advanced implementation of a quad ARM® Cortex®-A53 core, which operates at speeds of up to 1.8GHz (consumer version) and 1.5GHz (industrial version). A general purpose Cortex®-M4 core processor is for low-power processing. A 32-bit LPDDR4 is used for memory. There are a number of other i.MX 8M Mini interfaces for connecting peripherals, such as displays, cameras, GPS and sensors, which are extended by components already available on the module:

• a stereo, hi-fi quality audio-codec.

• a FPGA with up to 4300 LUT to convert parallel display/camera/data-streams to/from MIPI and for user defined programmable logic.

• a programmable Cortex-M0 for realtime processing, capable of reading multiple 16bit analog inputs, usable as resistive touch-controller and for CAN communication.

• WLAN 802.11 a/b/g/n/ac and BT 4.2 / 5 module

The Trizeps VIII Mini module got a SODIMM200 card edge connector and a 60pin FX11 high-speed board connector. The pinning of both connectors is to a large extent compatible to previous Trizeps modules. The main difference is the GBit Ethernet feature, which use the pins of the now missing parallel address-/databus.

Difference to Trizeps VIII

The i.MX8M Mini processor of Trizeps VIII Mini benefits from advanced 14nm LPC FinFET Technology, which allows for lesser power-consumption and higher operating frequencies than the i.MX8 used on Trizeps VIII.

The Trizeps VIII offers more interfaces:

• HDMI

• support of 4K displays

• two USB3.0 instead of USB2.0 ports.

• additional 4ch MIPI CSI port.

• larger L2 cache.

The GPIO pinning between both modules is kept the same for maximum compatibility.

Difference to Trizeps VIII Nano

The i.MX 8M Nano processor of Trizeps VIII Nano is similiar to the i.MX 8M Mini processor used on Trizeps VIII Mini, but has less features.

The Trizeps VIII Nano lacks some interfaces:

• VPU

• PCIe

• only one USB2.0 port.

• 16bit instead of 32bit LPDDR4.

The GPIO pinning between both modules is kept the same for maximum compatibility. 10 GPIO SODIMM-pins ( 110,112,114,-,130) are not connected on Trizeps VIII Nano.

Block Diagram

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Technical Documents

Datasheet / Datenblatt: TrizepsVIII-Mini_Datasheet_V3.2

Changes of key components over the revisions

Features and Interfaces

Features

Processor:

NXP i.MX 8M Mini ARM^® Quad Cortex-A53 at up to 1.8GHz (consumer), 1.6GHz (industrial)
NXP i.MX 8M Mini ARM^® Cortex-M4
NXP Kinetis V ARM^® Cortex-M0+ at up to 75MHz

Memory:

1 or 2 GByte of 32-bit LPDDR4-3200
Higher densities are available on request.

Storage:

Micro-SD socket or
4 or 8 GByte eMMC
Higher densities are available on request.

Wireless:

WLAN 802.11 a/b/g/n/ac
BT 4.2 and BT 5.0 ready
Micro RF-antenna connector

Power:

PMIC to generate all internal and external voltages from 3.3V supply.

Dimensions:

(Length x Width x Height):      67.6 x 36.7 x 6.4 mm

Interfaces / Signals accessible over connectors

• Power Supply through +3.3V.

• 2x USB2.0 OTG port (USB Host or Slave).

• PCIe

• SD/SDIO Card Interface

• 4x UART

• SPI and Quad-SPI

• 2x I2C

• Mipi Display (4ch) or Single/Dual LVDS or parallel RGB Display.

• 1x Mipi Camera (4ch).

• 1Gbit,100/10Mbit Ethernet

• 1x CAN

• 2x 4ch 16bit ADC

• Stereo Headphone

• Stereo Line-In

• Microphone input

• 1W Speaker output

• SPDIF In and Out

• Multi-Channel Serial-Audio-Interface

• GPIO, PWM

1 Pin-description

The main connector of the Trizeps VIII Mini is the SODIMM200 connector.
To operate, only +3V3 and GND pins need to be connected. Leave unused pins unconnected.
The U14 Board2Board connector can be omitted if the signals are not needed.
J1 and J2 may be used for debugging, programming and testing.
On the bottom side are UFL antenna connectors for the on-board WLAN + BT chip.

J2: FPGA and MCU JTAG               
              J1: i.MX 8M Mini JTAG                                                                             

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U14: Board2Board Connector

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Figure 1-1: Connectors

1.1      Pin-Description (Primary Function)

The i.MX8M Mini processor, the Cortex M0+ MCU and the FPGA are highly configurable devices, where each pin may have multiple different functions.
The pin-names are derived from previous Trizeps-versions and their primary or most interesting function.
Please view chapter “1.2 Pin-Mux Information” for details on how these pins may be configured by software.

Notes:

*1) In the table below, some of the old Trizeps pin-names are placed in brackets [ ] for reference.

*2) FPGA_CIF_D[9..0]  / SAIx_RXD[7..0], FPGA_CIF_HSYNC, FPGA_CIF_MCLK and FPGA_CIF_PCLK are routed to the FPGA and the i.MX 8M. In the following documentation they are either named FPGA_CIF_Dx or SAIx_RXDy, depending if the FPGA or i.MX 8M function is described.

*3) FPGA_CIF_VSYNC, FPGA_CIF_HSYNC, FPGA_CIF_MCLK and FPGA_CIF_PCLK are connected to i.MX 8M pins, if the FPGA is not mounted (RA3).

*4) BT_PCM_IN, BT_PCM_OUT, BT_PCM_SYNC and BT_PCM_CLK are connected to the on-board BT-module if it is mounted!

*5) PCIE_CLKREQ may not be usable when Wifi module is mounted.

 J500: SODIMM Connector